Searched refs:XCHAL_TRAX_TIME_WIDTH (Results 1 – 14 of 14) sorted by relevance
| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 562 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 562 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 562 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 585 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 598 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 600 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 600 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 655 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 653 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 679 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 627 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core-isa.h | 694 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 750 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 765 #define XCHAL_TRAX_TIME_WIDTH 0 /* timestamp bitwidth, 0=none */ macro
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