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Searched refs:XCHAL_RESET_VECTOR1_PADDR (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h624 #define XCHAL_RESET_VECTOR1_PADDR 0x40000640 macro
626 #define XCHAL_RESET_VECTOR_PADDR XCHAL_RESET_VECTOR1_PADDR
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h392 #define XCHAL_RESET_VECTOR1_PADDR 0x00001000 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h489 #define XCHAL_RESET_VECTOR1_PADDR 0xBE800000 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h489 #define XCHAL_RESET_VECTOR1_PADDR 0xBE800000 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h489 #define XCHAL_RESET_VECTOR1_PADDR 0xBE800000 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h512 #define XCHAL_RESET_VECTOR1_PADDR 0xBE800000 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h531 #define XCHAL_RESET_VECTOR1_PADDR 0x40000400 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h539 #define XCHAL_RESET_VECTOR1_PADDR 0x3B740400 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h539 #define XCHAL_RESET_VECTOR1_PADDR 0x596F8660 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h594 #define XCHAL_RESET_VECTOR1_PADDR 0x1FF00000 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h592 #define XCHAL_RESET_VECTOR1_PADDR 0xFE000C00 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h566 #define XCHAL_RESET_VECTOR1_PADDR 0x20100000 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h627 #define XCHAL_RESET_VECTOR1_PADDR 0x40000400 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h689 #define XCHAL_RESET_VECTOR1_PADDR 0x20100000 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h704 #define XCHAL_RESET_VECTOR1_PADDR 0x00400000 macro