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Searched refs:XCHAL_NMILEVEL (Results 1 – 16 of 16) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h284 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h385 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h385 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h385 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h408 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h405 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h384 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h384 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h487 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h487 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h411 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h480 #define XCHAL_NMILEVEL 7 /* NMI "level" (for use with macro
Dcore.h277 # define XCHAL_NMILEVEL (XCHAL_NUM_INTLEVELS+1)
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h511 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h525 #define XCHAL_NMILEVEL 5 /* NMI "level" (for use with macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h240 # define XCHAL_NMILEVEL (XCHAL_NUM_INTLEVELS+1)