Home
last modified time | relevance | path

Searched refs:XCHAL_L1SCACHE_SIZE (Results 1 – 6 of 6) sorted by relevance

/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h318 #define XCHAL_L1SCACHE_SIZE 0 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h318 #define XCHAL_L1SCACHE_SIZE 0 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h311 #define XCHAL_L1SCACHE_SIZE 0 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h306 #define XCHAL_L1SCACHE_SIZE 0 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h318 #define XCHAL_L1SCACHE_SIZE 0 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h316 #define XCHAL_L1SCACHE_SIZE 0 macro