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Searched refs:XCHAL_HAVE_NX (Results 1 – 7 of 7) sorted by relevance

/hal_xtensa-latest/src/hal/
Dcache_asm.S59 #if (!defined(XCHAL_HAVE_NX) || XCHAL_HAVE_NX == 0) && XCHAL_DCACHE_SIZE > 0 \
132 #if (!defined(XCHAL_HAVE_NX) || XCHAL_HAVE_NX == 0) &&XCHAL_ICACHE_SIZE > 0 && \
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h97 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h97 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h97 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h98 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h97 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h97 #define XCHAL_HAVE_NX 0 /* NX core (starting RH) */ macro