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Searched refs:XCHAL_DCACHE_SIZE_LOG2 (Results 1 – 6 of 6) sorted by relevance

/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h299 #define XCHAL_DCACHE_SIZE_LOG2 15 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h299 #define XCHAL_DCACHE_SIZE_LOG2 15 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h292 #define XCHAL_DCACHE_SIZE_LOG2 17 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h287 #define XCHAL_DCACHE_SIZE_LOG2 0 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h299 #define XCHAL_DCACHE_SIZE_LOG2 16 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h297 #define XCHAL_DCACHE_SIZE_LOG2 0 macro