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Searched refs:XCHAL_NUM_DATARAM (Results 1 – 11 of 11) sorted by relevance

/hal_xtensa-3.4.0/src/hal/
Dmisc.c138 const unsigned char Xthal_num_dataram = XCHAL_NUM_DATARAM;
159 MEMTRIPLET(XCHAL_NUM_DATARAM, dataram, DATARAM)
174 const unsigned char Xthal_num_dram = XCHAL_NUM_DATARAM; /*DEPRECATED*/
/hal_xtensa-3.4.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h316 #define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h316 #define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h316 #define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h309 #define XCHAL_NUM_DATARAM 2 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h316 #define XCHAL_NUM_DATARAM 1 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h404 #define XCHAL_NUM_DATARAM 1 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
Dcore-isa.h287 #define XCHAL_NUM_DATARAM 2 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h287 #define XCHAL_NUM_DATARAM 2 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_s1000/xtensa/config/
Dcore-isa.h365 #define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */ macro
/hal_xtensa-3.4.0/include/xtensa/config/
Dcore.h729 #define XCHAL_NUM_DRAM XCHAL_NUM_DATARAM /* (DEPRECATED) */