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Searched refs:XCHAL_INT20_LEVEL (Results 1 – 10 of 10) sorted by relevance

/hal_xtensa-3.4.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h382 #define XCHAL_INT20_LEVEL 7 macro
/hal_xtensa-3.4.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h382 #define XCHAL_INT20_LEVEL 7 macro
/hal_xtensa-3.4.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h382 #define XCHAL_INT20_LEVEL 7 macro
/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h401 #define XCHAL_INT20_LEVEL 1 macro
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h405 #define XCHAL_INT20_LEVEL 7 macro
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
Dcore-isa.h370 #define XCHAL_INT20_LEVEL 2 macro
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h370 #define XCHAL_INT20_LEVEL 2 macro
/hal_xtensa-3.4.0/zephyr/soc/intel_s1000/xtensa/config/
Dcore-isa.h435 #define XCHAL_INT20_LEVEL 7 macro
/hal_xtensa-3.4.0/src/hal/
Dinterrupts.c329 DEFAULT_INTVPRI( XCHAL_INT20_LEVEL ),
/hal_xtensa-3.4.0/include/xtensa/config/
Dcore.h264 XCHAL_SEP XCHAL_INT20_LEVEL \
420 # define XCHAL_INT20_LEVEL 0 macro