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Searched refs:XCHAL_HAVE_PIF (Results 1 – 11 of 11) sorted by relevance

/hal_xtensa-3.4.0/src/hal/
Dmisc.c69 const unsigned char Xthal_have_pif = XCHAL_HAVE_PIF;
/hal_xtensa-3.4.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h275 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h275 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h275 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h268 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h275 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h353 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
Dcore-isa.h248 #define XCHAL_HAVE_PIF 1 /* any outbound PIF present */ macro
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h248 #define XCHAL_HAVE_PIF 1 /* any outbound PIF present */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_s1000/xtensa/config/
Dcore-isa.h317 #define XCHAL_HAVE_PIF 1 /* any outbound bus present */ macro
/hal_xtensa-3.4.0/include/xtensa/config/
Dcore.h107 XCHAL_ICACHE_SIZE != 0 && XCHAL_HAVE_PIF /*covers also AXI/AHB*/ && \