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Searched refs:XCHAL_DATARAM0_VADDR (Results 1 – 6 of 6) sorted by relevance

/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h322 #define XCHAL_DATARAM0_VADDR 0x3FFE0000 /* virtual address */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h329 #define XCHAL_DATARAM0_VADDR 0x9F000000 /* virtual address */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h419 #define XCHAL_DATARAM0_VADDR 0x1FE00000 /* virtual address */ macro
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
Dcore-isa.h298 #define XCHAL_DATARAM0_VADDR 0x596E8000 /* virtual address */ macro
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h298 #define XCHAL_DATARAM0_VADDR 0x3B6E8000 /* virtual address */ macro
/hal_xtensa-3.4.0/include/xtensa/config/
Dcore.h749 #define XCHAL_DRAM0_VADDR XCHAL_DATARAM0_VADDR /* (DEPRECATED) */