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Searched refs:XCHAL_CP5_SA_LIST (Results 1 – 9 of 9) sorted by relevance

/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
Dtie.h108 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dtie.h161 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dtie.h168 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
Dtie.h166 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
Dtie.h166 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dtie.h182 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dtie.h182 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dtie.h182 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro
/hal_xtensa-3.4.0/zephyr/soc/intel_s1000/xtensa/config/
Dtie.h192 #define XCHAL_CP5_SA_LIST(s) /* empty */ macro