Home
last modified time | relevance | path

Searched refs:XSHAL_STRICT_CACHEATTR_WRITEALLOC (Results 1 – 7 of 7) sorted by relevance

/hal_xtensa-2.7.6/zephyr/soc/nxp_imx8/xtensa/config/
Dsystem.h175 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFFF1F1FF /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/sample_controller/xtensa/config/
Dsystem.h175 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFFFF111F /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/intel_s1000/xtensa/config/
Dsystem.h164 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFF11FFFF /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/intel_apl_adsp/xtensa/config/
Dsystem.h179 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFF11FFFF /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/intel_cavs_18/xtensa/config/
Dsystem.h179 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFF11FFFF /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/intel_cavs_25/xtensa/config/
Dsystem.h179 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFF11FFFF /* enable caches in write-allocate mode */ macro
/hal_xtensa-2.7.6/zephyr/soc/intel_cavs_20/xtensa/config/
Dsystem.h179 #define XSHAL_STRICT_CACHEATTR_WRITEALLOC 0xFF11FFFF /* enable caches in write-allocate mode */ macro