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Searched refs:PRCM_I2SCLKCTL_WCLK_PHASE_M (Results 1 – 4 of 4) sorted by relevance

/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dprcm.c268 ASSERT(!(ui32ClkConfig & (PRCM_I2SCLKCTL_WCLK_PHASE_M | PRCM_I2SCLKCTL_SMPL_ON_POSEDGE_M))); in PRCMAudioClockConfigSet()
308 if((ui32ClkConfig & PRCM_I2SCLKCTL_WCLK_PHASE_M) == PRCM_WCLK_SINGLE_PHASE) in PRCMAudioClockConfigSet()
319 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSet()
336 ASSERT(!(ui32ClkConfig & (PRCM_I2SCLKCTL_WCLK_PHASE_M | PRCM_I2SCLKCTL_SMPL_ON_POSEDGE_M))); in PRCMAudioClockConfigSetOverride()
343 if((ui32ClkConfig & PRCM_I2SCLKCTL_WCLK_PHASE_M) == PRCM_WCLK_SINGLE_PHASE) in PRCMAudioClockConfigSetOverride()
354 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSetOverride()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Dprcm.c266 ASSERT(!(ui32ClkConfig & (PRCM_I2SCLKCTL_WCLK_PHASE_M | PRCM_I2SCLKCTL_SMPL_ON_POSEDGE_M))); in PRCMAudioClockConfigSet()
306 if((ui32ClkConfig & PRCM_I2SCLKCTL_WCLK_PHASE_M) == PRCM_WCLK_SINGLE_PHASE) in PRCMAudioClockConfigSet()
317 … ui32Reg = HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSet()
334 ASSERT(!(ui32ClkConfig & (PRCM_I2SCLKCTL_WCLK_PHASE_M | PRCM_I2SCLKCTL_SMPL_ON_POSEDGE_M))); in PRCMAudioClockConfigSetOverride()
341 if((ui32ClkConfig & PRCM_I2SCLKCTL_WCLK_PHASE_M) == PRCM_WCLK_SINGLE_PHASE) in PRCMAudioClockConfigSetOverride()
352 … ui32Reg = HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSetOverride()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_prcm.h1405 #define PRCM_I2SCLKCTL_WCLK_PHASE_M 0x00000006 macro
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_prcm.h1408 #define PRCM_I2SCLKCTL_WCLK_PHASE_M 0x00000006 macro