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Searched refs:HWREGH (Results 1 – 18 of 18) sorted by relevance

/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/inc/
Dhw_types.h85 #define HWREGH(x) \ macro
100 #define HWREGH_READ_LRF(x) HWREGH(x)
112 #define HWREGH_WRITE_LRF(x) HWREGH(x)
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Di2s.h969 HWREGH(I2S0_BASE + I2S_O_AIFFMTCFG) = in I2SFormatConfigure()
977 HWREGH(I2S0_BASE + I2S_O_STMPWPER) = ui16transmissionDelay; in I2SFormatConfigure()
1226 HWREGH(I2S0_BASE + I2S_O_STMPINTRIG) = ui16TrigValue; in I2SSampleStampInConfigure()
1248 HWREGH(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui16TrigValue; in I2SSampleStampOutConfigure()
1271 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = i16Value; in I2SWclkCounterConfigure()
1276 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = HWREGH(I2S0_BASE + I2S_O_STMPWPER) - ui16MinusValue; in I2SWclkCounterConfigure()
1295 HWREGH(I2S0_BASE + I2S_O_STMPWSET) = 0; in I2SWclkCounterReset()
Dadi.h196 HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val; in ADI16RegWrite()
304 return(HWREGH(ui32Base + (ui32Reg & 0xFE))); in ADI16RegRead()
431 HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val; in ADI16BitsSet()
572 HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val; in ADI16BitsClear()
720 HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val; in ADI8SetValBit()
Dosc.h316 … uint16_t hfSrc = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0) & DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M; in OSCHfSourceSwitch()
324 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSCHfSourceSwitch()
383 uint16_t regVal = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSC_IsHPOSCEnabledWithHfDerivedLfClock()
Dddi.c168 ui16Data = HWREGH(ui32RegAddr); in DDI16BitRead()
204 ui16Data = HWREGH(ui32RegAddr); in DDI16BitfieldRead()
Dsetup.c273 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in TrimAfterColdResetWakeupFromShutDown()
322HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_COMP * 2 )) = // Set LPM_BIAS_WIDTH_TRIM = 3 in TrimAfterColdResetWakeupFromShutDown()
Dddi.h277 HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val; in DDI8SetValBit()
Dsetup_rom.c181 HWREGH( ADI3_BASE + ADI_O_MASK8B + ( ADI_3_REFSYS_O_REFSYSCTL1 * 2 )) = in SetupAfterColdResetWakeupFromShutDownCfg1()
306 HWREGH( AUX_DDI0_OSC_BASE + DDI_O_MASK8B + ( DDI_0_OSC_O_LFOSCCTL * 2 ) + 4 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Di2s.h971 HWREGH(I2S0_BASE + I2S_O_AIFFMTCFG) = in I2SFormatConfigure()
979 HWREGH(I2S0_BASE + I2S_O_STMPWPER) = ui16transmissionDelay; in I2SFormatConfigure()
1228 HWREGH(I2S0_BASE + I2S_O_STMPINTRIG) = ui16TrigValue; in I2SSampleStampInConfigure()
1250 HWREGH(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui16TrigValue; in I2SSampleStampOutConfigure()
1273 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = i16Value; in I2SWclkCounterConfigure()
1278 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = HWREGH(I2S0_BASE + I2S_O_STMPWPER) - ui16MinusValue; in I2SWclkCounterConfigure()
1297 HWREGH(I2S0_BASE + I2S_O_STMPWSET) = 0; in I2SWclkCounterReset()
Dadi.h198 HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val; in ADI16RegWrite()
306 return(HWREGH(ui32Base + (ui32Reg & 0xFE))); in ADI16RegRead()
433 HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val; in ADI16BitsSet()
574 HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val; in ADI16BitsClear()
722 HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val; in ADI8SetValBit()
Dosc.h318 … uint16_t hfSrc = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0) & DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M; in OSCHfSourceSwitch()
326 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSCHfSourceSwitch()
385 uint16_t regVal = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSC_IsHPOSCEnabledWithHfDerivedLfClock()
Dddi.c170 ui16Data = HWREGH(ui32RegAddr); in DDI16BitRead()
206 ui16Data = HWREGH(ui32RegAddr); in DDI16BitfieldRead()
Dsetup.c265 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in TrimAfterColdResetWakeupFromShutDown()
310HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_COMP * 2 )) = // Set LPM_BIAS_WIDTH_TRIM = 3 in TrimAfterColdResetWakeupFromShutDown()
Dddi.h280 HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val; in DDI8SetValBit()
Dsetup_rom.c182 HWREGH( ADI3_BASE + ADI_O_MASK8B + ( ADI_3_REFSYS_O_REFSYSCTL1 * 2 )) = in SetupAfterColdResetWakeupFromShutDownCfg1()
307 HWREGH( AUX_DDI0_OSC_BASE + DDI_O_MASK8B + ( DDI_0_OSC_O_LFOSCCTL * 2 ) + 4 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
/hal_ti-latest/simplelink/source/ti/devices/cc32xx/inc/
Dhw_types.h59 #define HWREGH(x) \ macro
67 HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_types.h86 #define HWREGH(x) \ macro
112 HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_types.h88 #define HWREGH(x) \ macro
114 HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \