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Searched refs:HWREGB (Results 1 – 25 of 28) sorted by relevance

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/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Daux_dac.c47 HWREGB(AUX_ADI4_BASE + ADI_4_AUX_O_MUX2) = refSource; in AUXDACSetVref()
52 …HWREGB(AUX_ADI4_BASE + ADI_4_AUX_O_ADCREF0) |= ADI_4_AUX_ADCREF0_REF_ON_IDLE | ADI_4_AUX_ADCREF0_E… in AUXDACSetVref()
91 …refSource = ((HWREGB(AUX_ADI4_BASE + ADI_4_AUX_O_MUX2) & ADI_4_AUX_MUX2_DAC_VREF_SEL_M) >> ADI_4_A… in AUXDACCalcMax()
145 …refSource = ((HWREGB(AUX_ADI4_BASE + ADI_4_AUX_O_MUX2) & ADI_4_AUX_MUX2_DAC_VREF_SEL_M) >> ADI_4_A… in AUXDACCalcMin()
209 … HWREGB(AUX_SYSIF_BASE + AUX_SYSIF_O_PEROPRATE) |= AUX_SYSIF_PEROPRATE_ANAIF_DAC_OP_RATE_BUS_RATE; in AUXDACSetSampleClock()
212 HWREGB(AUX_ANAIF_BASE + AUX_ANAIF_O_DACSMPLCFG0) = dacClkDiv; in AUXDACSetSampleClock()
224 HWREGB(AUX_ANAIF_BASE + AUX_ANAIF_O_DACVALUE) = dacCode; in AUXDACSetCode()
239 HWREGB(AUX_ANAIF_BASE + AUX_ANAIF_O_LPMBIASCTL) = 0x0; in AUXDACEnable()
242 HWREGB(AUX_ANAIF_BASE + AUX_ANAIF_O_DACSMPLCTL) = AUX_ANAIF_DACSMPLCTL_EN; in AUXDACEnable()
245 …HWREGB(AUX_ANAIF_BASE + AUX_ANAIF_O_DACCTL) |= AUX_ANAIF_DACCTL_DAC_EN | AUX_ANAIF_DACCTL_DAC_BUFF… in AUXDACEnable()
[all …]
Dsetup.c262 HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 | in TrimAfterColdResetWakeupFromShutDown()
292 … HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL3 ) |= ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST ; in TrimAfterColdResetWakeupFromShutDown()
311 …HWREGB( AUX_ADI4_BASE + ADI_4_AUX_O_LPMBIAS ) = (( ui32TrimValue << ADI_4_AUX_LPMBIAS_LPM_TRIM_IOU… in TrimAfterColdResetWakeupFromShutDown()
315 …HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKU… in TrimAfterColdResetWakeupFromShutDown()
317 …HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKU… in TrimAfterColdResetWakeupFromShutDown()
Devent.h197 HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 1; in EventSwEventSet()
220 HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 0; in EventSwEventClear()
245 return( HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent)); in EventSwEventGet()
Dsetup_rom.c126 HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) & in SetupStepVddrTrimTo()
143 HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) = ( in SetupStepVddrTrimTo()
144 … ( HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) & ~ADI_3_REFSYS_DCDCCTL0_VDDR_TRIM_M ) | in SetupStepVddrTrimTo()
177 …HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_… in SetupAfterColdResetWakeupFromShutDownCfg1()
184 …HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_… in SetupAfterColdResetWakeupFromShutDownCfg1()
265 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
272 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
287 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 4 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
296 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( 0x00000020 * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
387 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_CTL1 * 2 )) = ( 0x30 | ui32Trim ); in SetupAfterColdResetWakeupFromShutDownCfg3()
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Dadi.h154 HWREGB(ui32Base + ui32Reg) = ui8Val; in ADI8RegWrite()
269 return(HWREGB(ui32Base + ui32Reg)); in ADI8RegRead()
384 HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val; in ADI8BitsSet()
525 HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val; in ADI8BitsClear()
672 HWREGB(ui32Base + ui32RegOffset) = (ui8Mask << 4) | ui8Val; in ADI4SetValBit()
Di2s.h1030 HWREGB(I2S0_BASE + I2S_O_AIFDIRCFG) = (ui8StatusAD0 | ui8StatusAD1); in I2SFrameConfigure()
1033 HWREGB(I2S0_BASE + I2S_O_AIFWMASK0) = ui8ChanAD0; in I2SFrameConfigure()
1034 HWREGB(I2S0_BASE + I2S_O_AIFWMASK1) = ui8ChanAD1; in I2SFrameConfigure()
1071 HWREGB(I2S0_BASE + I2S_O_AIFWCLKSRC) = in I2SWclkConfigure()
Daon_batmon.c71 voltageSlope = ((int8_t)HWREGB( FCFG1_BASE + FCFG1_O_MISC_TRIM )); in AONBatMonTemperatureGetDegC()
Drfc.h386 return (bool)(HWREGB(RFC_PA_TYPE_ADDRESS) & RFC_PA_TYPE_MASK); in RFCGetPaType()
Dgpio.h229 HWREGB( GPIO_BASE + dioNumber ) = value; in GPIO_writeDio()
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/inc/
Dhw_types.h91 #define HWREGB(x) \ macro
104 #define HWREGB_READ_LRF(x) HWREGB(x)
116 #define HWREGB_WRITE_LRF(x) HWREGB(x)
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dsetup.c251 HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 | in TrimAfterColdResetWakeupFromShutDown()
280 … HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL3 ) = ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST ; in TrimAfterColdResetWakeupFromShutDown()
299 …HWREGB( AUX_ADI4_BASE + ADI_4_AUX_O_LPMBIAS ) = (( ui32TrimValue << ADI_4_AUX_LPMBIAS_LPM_TRIM_IOU… in TrimAfterColdResetWakeupFromShutDown()
303 …HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKU… in TrimAfterColdResetWakeupFromShutDown()
305 …HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKU… in TrimAfterColdResetWakeupFromShutDown()
Devent.h199 HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 1; in EventSwEventSet()
222 HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 0; in EventSwEventClear()
247 return( HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent)); in EventSwEventGet()
Dsetup_rom.c127 HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) & in SetupStepVddrTrimTo()
144 HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) = ( in SetupStepVddrTrimTo()
145 … ( HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL0 ) & ~ADI_3_REFSYS_DCDCCTL0_VDDR_TRIM_M ) | in SetupStepVddrTrimTo()
178 …HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_… in SetupAfterColdResetWakeupFromShutDownCfg1()
185 …HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_… in SetupAfterColdResetWakeupFromShutDownCfg1()
266 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
273 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
288 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_ADCDOUBLERNANOAMPCTL * 2 ) + 4 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
297 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( 0x00000020 * 2 ) + 1 ) = in SetupAfterColdResetWakeupFromShutDownCfg2()
389 HWREGB( AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( DDI_0_OSC_O_CTL1 * 2 )) = ( 0x30 | ui32Trim ); in SetupAfterColdResetWakeupFromShutDownCfg3()
[all …]
Dadi.h156 HWREGB(ui32Base + ui32Reg) = ui8Val; in ADI8RegWrite()
271 return(HWREGB(ui32Base + ui32Reg)); in ADI8RegRead()
386 HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val; in ADI8BitsSet()
527 HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val; in ADI8BitsClear()
674 HWREGB(ui32Base + ui32RegOffset) = (ui8Mask << 4) | ui8Val; in ADI4SetValBit()
Di2s.h1032 HWREGB(I2S0_BASE + I2S_O_AIFDIRCFG) = (ui8StatusAD0 | ui8StatusAD1); in I2SFrameConfigure()
1035 HWREGB(I2S0_BASE + I2S_O_AIFWMASK0) = ui8ChanAD0; in I2SFrameConfigure()
1036 HWREGB(I2S0_BASE + I2S_O_AIFWMASK1) = ui8ChanAD1; in I2SFrameConfigure()
1073 HWREGB(I2S0_BASE + I2S_O_AIFWCLKSRC) = in I2SWclkConfigure()
Daon_batmon.c73 voltageSlope = ((int8_t)HWREGB( FCFG1_BASE + FCFG1_O_MISC_TRIM )); in AONBatMonTemperatureGetDegC()
Dsys_ctrl.c294 …HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_CTL_RECHARGE_CMP0 * 2 )) = (( ADI_3_REFSYS_CTL… in SysCtrlSetRechargeBeforePowerDown()
297 HWREGB( ADI3_BASE + ADI_3_REFSYS_O_CTL_RECHARGE_CMP0 ); in SysCtrlSetRechargeBeforePowerDown()
Drfc.h385 return (bool)(HWREGB(RFC_PA_TYPE_ADDRESS) & RFC_PA_TYPE_MASK); in RFCGetPaType()
Dgpio.h232 HWREGB( GPIO_BASE + dioNumber ) = value;
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/driverlib/
Dsetup.c49 trimState = HWREGB(0x4E00032F); in SetupTrimDevice()
55 trimState = HWREGB(0x4E0003AF); in SetupTrimDevice()
Duart.h315 return (HWREGB(base + UART_O_DR)); in UARTGetCharNonBlocking()
Dgpio.h201 HWREGB( GPIO_BASE + GPIO_O_DOUT3_0 + dioNumber ) = value; in GPIOWriteDio()
/hal_ti-latest/simplelink/source/ti/devices/cc32xx/inc/
Dhw_types.h61 #define HWREGB(x) \ macro
70 HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_types.h92 #define HWREGB(x) \ macro
117 HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_types.h94 #define HWREGB(x) \ macro
119 HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \

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