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Searched refs:AUX_SYSIF_BASE (Results 1 – 10 of 10) sorted by relevance

/hal_ti-latest/simplelink/source/ti/drivers/power/
DPowerCC26X2_calibrateRCOSC.c330 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCCLKCTL) = AUX_SYSIF_TDCCLKCTL_REQ; in runCalibrateFsm()
355 HWREG(AUX_SYSIF_BASE +AUX_SYSIF_O_TDCCLKCTL) = AUX_SYSIF_TDCCLKCTL_REQ; in runCalibrateFsm()
358 while(!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCCLKCTL) & in runCalibrateFsm()
368 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL) = 0; in runCalibrateFsm()
384 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) = 0; in runCalibrateFsm()
387 while(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) & AUX_SYSIF_TDCREFCLKCTL_ACK); in runCalibrateFsm()
403 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) = AUX_SYSIF_TDCREFCLKCTL_REQ; in runCalibrateFsm()
415 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) = 0; in runCalibrateFsm()
418 while(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) & AUX_SYSIF_TDCREFCLKCTL_ACK); in runCalibrateFsm()
440 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL) = AUX_SYSIF_TDCREFCLKCTL_REQ; in runCalibrateFsm()
[all …]
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Daux_sysif.c80 currentOpMode = HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ); in AUXSYSIFOpModeChange()
81 while ( currentOpMode != HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEACK)); in AUXSYSIFOpModeChange()
93 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = nextMode; in AUXSYSIFOpModeChange()
Daux_adc.c105 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0; in AUXADCDisable()
125 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M; in AUXADCEnableAsync()
126 while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M)); in AUXADCEnableAsync()
165 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M; in AUXADCEnableSyncNoBugWorkaround()
166 while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M)); in AUXADCEnableSyncNoBugWorkaround()
Dsetup_rom.c937 …HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINC0 ) = (( subSecInc ) & AUX_SYSIF_RTCSUBSECIN… in SetupSetAonRtcSubSecInc()
938 …HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINC1 ) = (( subSecInc >> 16 ) & AUX_SYSIF_RTCSUBSECIN… in SetupSetAonRtcSubSecInc()
940 HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL ) = AUX_SYSIF_RTCSUBSECINCCTL_UPD_REQ; in SetupSetAonRtcSubSecInc()
941 …while( ! ( HWREGBITW( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL, AUX_SYSIF_RTCSUBSECINCCTL_UPD_… in SetupSetAonRtcSubSecInc()
942 HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL ) = 0; in SetupSetAonRtcSubSecInc()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Daux_sysif.c79 currentOpMode = HWREG(AUX_SYSIF_BASE + NONSECURE_OFFSET + AUX_SYSIF_O_OPMODEREQ); in AUXSYSIFOpModeChange()
80 while ( currentOpMode != HWREG(AUX_SYSIF_BASE + NONSECURE_OFFSET + AUX_SYSIF_O_OPMODEACK)); in AUXSYSIFOpModeChange()
92 HWREG(AUX_SYSIF_BASE + NONSECURE_OFFSET + AUX_SYSIF_O_OPMODEREQ) = nextMode; in AUXSYSIFOpModeChange()
Daux_dac.c209 … HWREGB(AUX_SYSIF_BASE + AUX_SYSIF_O_PEROPRATE) |= AUX_SYSIF_PEROPRATE_ANAIF_DAC_OP_RATE_BUS_RATE; in AUXDACSetSampleClock()
236 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = AUX_SYSIF_OPMODEREQ_REQ_A; in AUXDACEnable()
271 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = AUX_SYSIF_OPMODEREQ_REQ_PDA; in AUXDACDisable()
274 HWREGB(AUX_SYSIF_BASE + AUX_SYSIF_O_PEROPRATE) = AUX_SYSIF_PEROPRATE_ANAIF_DAC_OP_RATE_SCE_RATE; in AUXDACDisable()
Daux_adc.c103 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0; in AUXADCDisable()
123 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M; in AUXADCEnableAsync()
124 while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M)); in AUXADCEnableAsync()
163 HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M; in AUXADCEnableSyncNoBugWorkaround()
164 while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M)); in AUXADCEnableSyncNoBugWorkaround()
Dsetup_rom.c935 …HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINC0 ) = (( subSecInc ) & AUX_SYSIF_RTCSUBSECIN… in SetupSetAonRtcSubSecInc()
936 …HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINC1 ) = (( subSecInc >> 16 ) & AUX_SYSIF_RTCSUBSECIN… in SetupSetAonRtcSubSecInc()
938 HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL ) = AUX_SYSIF_RTCSUBSECINCCTL_UPD_REQ; in SetupSetAonRtcSubSecInc()
939 …while( ! ( HWREGBITW( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL, AUX_SYSIF_RTCSUBSECINCCTL_UPD_… in SetupSetAonRtcSubSecInc()
940 HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_RTCSUBSECINCCTL ) = 0; in SetupSetAonRtcSubSecInc()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_memmap.h93 #define AUX_SYSIF_BASE 0x400C6000 // AUX_SYSIF macro
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h93 #define AUX_SYSIF_BASE 0x400C6000 // AUX_SYSIF macro