FLCTL_A (reference) in projects: hal_ti-3.4.0

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Searched refs:FLCTL_A (Results 1 – 8 of 8) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
D	flash_a.c	51 { (uint32_t)&FLCTL_A->PRGBRST_DATA0_0, (uint32_t)&FLCTL_A->PRGBRST_DATA0_1, 52 (uint32_t) &FLCTL_A->PRGBRST_DATA0_2, (uint32_t)&FLCTL_A->PRGBRST_DATA0_3, 53 (uint32_t)&FLCTL_A->PRGBRST_DATA1_0,(uint32_t) &FLCTL_A->PRGBRST_DATA1_1, 54 (uint32_t)&FLCTL_A->PRGBRST_DATA1_2, (uint32_t)&FLCTL_A->PRGBRST_DATA1_3, 55 (uint32_t) &FLCTL_A->PRGBRST_DATA2_0, (uint32_t)&FLCTL_A->PRGBRST_DATA2_1, 56 (uint32_t)&FLCTL_A->PRGBRST_DATA2_2,(uint32_t) &FLCTL_A->PRGBRST_DATA2_3, 57 (uint32_t) &FLCTL_A->PRGBRST_DATA3_0,(uint32_t) &FLCTL_A->PRGBRST_DATA3_1, 58 (uint32_t) &FLCTL_A->PRGBRST_DATA3_2,(uint32_t) &FLCTL_A->PRGBRST_DATA3_3 }; 62 pReg->B0_INFO_R0 = FLCTL_A->BANK0_INFO_WEPROT; in __saveProtectionRegisters() 63 pReg->B1_INFO_R0 = FLCTL_A->BANK1_INFO_WEPROT; in __saveProtectionRegisters() [all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/startup_system_files/
D	system_msp432p4111.c	310 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 311 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 332 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 333 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 354 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 355 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 378 FLCTL_A->BANK0_RDCTL \|= (FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 379 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() [all …]
D	system_msp432p411v.c	310 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 311 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 332 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 333 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 354 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 355 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 378 FLCTL_A->BANK0_RDCTL \|= (FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 379 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() [all …]
D	system_msp432p411y.c	310 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 311 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 332 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 333 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 354 FLCTL_A->BANK0_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 355 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK \| FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit() 378 FLCTL_A->BANK0_RDCTL \|= (FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() 379 FLCTL_A->BANK1_RDCTL &= ~(FLCTL_A_BANK0_RDCTL_BUFD \| FLCTL_A_BANK0_RDCTL_BUFI); in SystemInit() [all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
D	msp432p4111.h	`1415 #define FLCTL_A ((FLCTL_A_Type *) FLCTL_A_BASE) macro`
D	msp432p411v.h	`1415 #define FLCTL_A ((FLCTL_A_Type *) FLCTL_A_BASE) macro`
D	msp432p411y.h	`1415 #define FLCTL_A ((FLCTL_A_Type *) FLCTL_A_BASE) macro`
D	msp432p4xx.h	`1293 #define FLCTL_A ((FLCTL_A_Type *) FLCTL_A_BASE) macro`

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TraceRecorderSource-3.4.0
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