Searched refs:DDI_0_OSC_O_CTL0 (Results 1 – 7 of 7) sorted by relevance
| /hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/ |
| D | osc.h | 159 DDI16BitWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, DDI_0_OSC_CTL0_XOSC_HF_POWER_MODE, in OSCXHfPowerModeSet()
181 DDI16BitfieldWrite( AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, in OSCClockLossEventEnable()
204 DDI16BitfieldWrite( AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, in OSCClockLossEventDisable()
316 … uint16_t hfSrc = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0) & DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M; in OSCHfSourceSwitch()
322 …HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_S… in OSCHfSourceSwitch()
324 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSCHfSourceSwitch()
334 …HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_S… in OSCHfSourceSwitch()
383 uint16_t regVal = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in OSC_IsHPOSCEnabledWithHfDerivedLfClock()
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| D | setup.c | 263 …HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_S… in TrimAfterColdResetWakeupFromShutDown()
265 HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0); in TrimAfterColdResetWakeupFromShutDown()
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| D | setup_rom.c | 345 … HWREG( AUX_DDI0_OSC_BASE + DDI_O_SET + DDI_0_OSC_O_CTL0 ) = DDI_0_OSC_CTL0_HPOSC_MODE_EN; in SetupAfterColdResetWakeupFromShutDownCfg3()
373 HWREG( AUX_DDI0_OSC_BASE + DDI_O_SET + DDI_0_OSC_O_CTL0 ) = DDI_0_OSC_CTL0_XTAL_IS_24M; in SetupAfterColdResetWakeupFromShutDownCfg3()
385 HWREG( AUX_DDI0_OSC_BASE + DDI_O_CLR + DDI_0_OSC_O_CTL0 ) = DDI_0_OSC_CTL0_CLK_LOSS_EN; in SetupAfterColdResetWakeupFromShutDownCfg3()
411 … HWREG( AUX_DDI0_OSC_BASE + DDI_O_SET + DDI_0_OSC_O_CTL0 ) = DDI_0_OSC_CTL0_XOSC_LF_DIG_BYPASS; in SetupAfterColdResetWakeupFromShutDownCfg3()
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| D | osc.c | 135 DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, in OSCClockSourceSet()
145 DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, in OSCClockSourceSet()
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| /hal_ti-2.7.6/simplelink/source/ti/drivers/power/ |
| D | PowerCC26X2_calibrateRCOSC.c | 344 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
350 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
397 DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, in runCalibrateFsm()
428 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
435 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
465 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
472 DDI_0_OSC_O_CTL0, in runCalibrateFsm()
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| D | PowerCC26X2.c | 304 HWREG(AUX_DDI0_OSC_BASE + DDI_O_CLR + DDI_0_OSC_O_CTL0) = DDI_0_OSC_CTL0_XTAL_IS_24M; in Power_init()
384 DDI_0_OSC_O_CTL0, in Power_init()
1197 DDI_0_OSC_O_CTL0, in disableLFClockQualifiers()
1214 DDI_0_OSC_O_CTL0, in disableLFClockQualifiers()
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| /hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/inc/ |
| D | hw_ddi_0_osc.h | 47 #define DDI_0_OSC_O_CTL0 0x00000000 macro
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