Searched refs:v7 (Results 1 – 17 of 17) sorted by relevance
| /Zephyr-latest/dts/common/nordic/ |
| D | nrf52840_partition_uf2_sdv7.dtsi | 18 * Default flash layout for nrf52840 using UF2 and SoftDevice s140 v7
20 * 0x00000000 SoftDevice s140 v7 (156 kB)
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| /Zephyr-latest/tests/arch/arm/arm_thread_swap/src/ |
| D | arm_thread_arch.c | 61 .v7 = 0x789abcde,
98 (src->v7 == dst->v7) && (src->v8 == dst->v8), in verify_callee_saved()
101 src->v1, src->v2, src->v3, src->v4, src->v5, src->v6, src->v7, src->v8, in verify_callee_saved()
102 dst->v1, dst->v2, dst->v3, dst->v4, dst->v5, dst->v6, dst->v7, dst->v8); in verify_callee_saved()
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| /Zephyr-latest/include/zephyr/arch/arm/ |
| D | thread.h | 32 uint32_t v7; /* r10 */ member
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| /Zephyr-latest/arch/arc/core/mpu/ |
| D | Kconfig | 13 v6 supports up to 32 regions. Note: MPU v5 & v7 are not supported.
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | coredump.c | 85 arch_blk.r.r10 = esf->extra_info.callee->v7; in arch_coredump_info_dump()
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| /Zephyr-latest/arch/arm/core/ |
| D | fatal.c | 58 callee->v7, callee->v8, callee->psp); in esf_dump()
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| D | gdbstub.c | 63 ctx.registers[R10] = esf->extra_info.callee->v7; in z_gdb_entry()
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| /Zephyr-latest/tests/arch/arm/arm_interrupt/src/ |
| D | arm_interrupt.c | 45 (callee_regs->v7 /* r10 */ == 10) && (callee_regs->v8 /* r11 */ == 11); in check_esf_matches_expectations()
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| /Zephyr-latest/boards/renesas/rzg3s_smarc/doc/ |
| D | index.rst | 234 The minimal version of SEGGER JLink SW which can perform flashing of QSPI memory is v7.96.
236 **Note:** It's verified that we can perform flashing successfully with SEGGER JLink SW v7.98g so pl…
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| /Zephyr-latest/doc/hardware/arch/ |
| D | arm_cortex_m.rst | 23 … | | Arm v6-M | Arm v7-M …
102 In Arm v6-M and Arm v7-M architecture variants, thread stacks are additionally required to align wi…
104 …nfig:option:`CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT`, that is enforced in Arm v6-M and Arm v7-M
660 | Architecture variant | Arm v6-M | Arm v7-M | Arm …
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.4.rst | 812 * Library has been updated to the new major release v7.0.2.
814 * It is important to note that v7 introduces multiple API changes and new
817 <https://github.com/lvgl/lvgl/releases/tag/v7.0.0>`_ for more information.
836 * Note that ROM usage is significantly higher on v7 for minimal
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| D | release-notes-3.0.rst | 294 differentiation between v7 and v8 Cortex-R.
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| D | release-notes-2.5.rst | 868 * Library has been updated to minor release v7.6.1
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| D | release-notes-3.1.rst | 1901 * :github:`40901` - RFC: API Change: update LVGL from v7 to v8
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| D | release-notes-3.3.rst | 3263 …esso55s28] flash range starts from Secure address which is not compatible with latest Jlink(v7.82a)
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| /Zephyr-latest/doc/hardware/porting/ |
| D | board_porting.rst | 462 for Arm v7-M cores.
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| /Zephyr-latest/samples/modules/tflite-micro/hello_world/train/ |
| D | train_hello_world_model.ipynb | 280 …yHz4cLCLo6lInpVHwK3REduPmm7kXw0cchHyeu7enTVMPv2S02UqpJP7/1+bNPK1I8CswDh2y2/v7+Qudz9uqHYB/b9xo1TbVS…
3145 …d0kPYImBzA8Y7S2wf20ZghCTC5DZgc0qh71J9T6necXS5duoS/vz/+/v7UqFGD2rVrW9aFEJb//v7+GB+wf6t1uOMvvviCZcuW…
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