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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_tim.h1747 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1748 ((__BASE__) == TIM_DMABASE_CR2) || \
1749 ((__BASE__) == TIM_DMABASE_SMCR) || \
1750 ((__BASE__) == TIM_DMABASE_DIER) || \
1751 ((__BASE__) == TIM_DMABASE_SR) || \
1752 ((__BASE__) == TIM_DMABASE_EGR) || \
1753 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1754 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1755 ((__BASE__) == TIM_DMABASE_CCER) || \
1756 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_tim.h1834 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1835 ((__BASE__) == TIM_DMABASE_CR2) || \
1836 ((__BASE__) == TIM_DMABASE_SMCR) || \
1837 ((__BASE__) == TIM_DMABASE_DIER) || \
1838 ((__BASE__) == TIM_DMABASE_SR) || \
1839 ((__BASE__) == TIM_DMABASE_EGR) || \
1840 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1841 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1842 ((__BASE__) == TIM_DMABASE_CCER) || \
1843 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_tim.h1859 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1860 ((__BASE__) == TIM_DMABASE_CR2) || \
1861 ((__BASE__) == TIM_DMABASE_SMCR) || \
1862 ((__BASE__) == TIM_DMABASE_DIER) || \
1863 ((__BASE__) == TIM_DMABASE_SR) || \
1864 ((__BASE__) == TIM_DMABASE_EGR) || \
1865 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1866 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1867 ((__BASE__) == TIM_DMABASE_CCER) || \
1868 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_tim.h1844 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1845 ((__BASE__) == TIM_DMABASE_CR2) || \
1846 ((__BASE__) == TIM_DMABASE_SMCR) || \
1847 ((__BASE__) == TIM_DMABASE_DIER) || \
1848 ((__BASE__) == TIM_DMABASE_SR) || \
1849 ((__BASE__) == TIM_DMABASE_EGR) || \
1850 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1851 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1852 ((__BASE__) == TIM_DMABASE_CCER) || \
1853 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_tim.h1855 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1856 ((__BASE__) == TIM_DMABASE_CR2) || \
1857 ((__BASE__) == TIM_DMABASE_SMCR) || \
1858 ((__BASE__) == TIM_DMABASE_DIER) || \
1859 ((__BASE__) == TIM_DMABASE_SR) || \
1860 ((__BASE__) == TIM_DMABASE_EGR) || \
1861 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1862 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1863 ((__BASE__) == TIM_DMABASE_CCER) || \
1864 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_tim.h1864 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1865 ((__BASE__) == TIM_DMABASE_CR2) || \
1866 ((__BASE__) == TIM_DMABASE_SMCR) || \
1867 ((__BASE__) == TIM_DMABASE_DIER) || \
1868 ((__BASE__) == TIM_DMABASE_SR) || \
1869 ((__BASE__) == TIM_DMABASE_EGR) || \
1870 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1871 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1872 ((__BASE__) == TIM_DMABASE_CCER) || \
1873 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_tim.h1858 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1859 ((__BASE__) == TIM_DMABASE_CR2) || \
1860 ((__BASE__) == TIM_DMABASE_SMCR) || \
1861 ((__BASE__) == TIM_DMABASE_DIER) || \
1862 ((__BASE__) == TIM_DMABASE_SR) || \
1863 ((__BASE__) == TIM_DMABASE_EGR) || \
1864 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1865 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1866 ((__BASE__) == TIM_DMABASE_CCER) || \
1867 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_tim.h1771 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1772 ((__BASE__) == TIM_DMABASE_CR2) || \
1773 ((__BASE__) == TIM_DMABASE_SMCR) || \
1774 ((__BASE__) == TIM_DMABASE_DIER) || \
1775 ((__BASE__) == TIM_DMABASE_SR) || \
1776 ((__BASE__) == TIM_DMABASE_EGR) || \
1777 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1778 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1779 ((__BASE__) == TIM_DMABASE_CCER) || \
1780 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_tim.h1766 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1767 ((__BASE__) == TIM_DMABASE_CR2) || \
1768 ((__BASE__) == TIM_DMABASE_SMCR) || \
1769 ((__BASE__) == TIM_DMABASE_DIER) || \
1770 ((__BASE__) == TIM_DMABASE_SR) || \
1771 ((__BASE__) == TIM_DMABASE_EGR) || \
1772 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1773 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1774 ((__BASE__) == TIM_DMABASE_CCER) || \
1775 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_tim.h1746 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1747 ((__BASE__) == TIM_DMABASE_CR2) || \
1748 ((__BASE__) == TIM_DMABASE_SMCR) || \
1749 ((__BASE__) == TIM_DMABASE_DIER) || \
1750 ((__BASE__) == TIM_DMABASE_SR) || \
1751 ((__BASE__) == TIM_DMABASE_EGR) || \
1752 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1753 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1754 ((__BASE__) == TIM_DMABASE_CCER) || \
1755 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim.h1649 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1650 ((__BASE__) == TIM_DMABASE_CR2) || \
1651 ((__BASE__) == TIM_DMABASE_SMCR) || \
1652 ((__BASE__) == TIM_DMABASE_DIER) || \
1653 ((__BASE__) == TIM_DMABASE_SR) || \
1654 ((__BASE__) == TIM_DMABASE_EGR) || \
1655 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1656 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1657 ((__BASE__) == TIM_DMABASE_CCER) || \
1658 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_tim.h1888 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1889 ((__BASE__) == TIM_DMABASE_CR2) || \
1890 ((__BASE__) == TIM_DMABASE_SMCR) || \
1891 ((__BASE__) == TIM_DMABASE_DIER) || \
1892 ((__BASE__) == TIM_DMABASE_SR) || \
1893 ((__BASE__) == TIM_DMABASE_EGR) || \
1894 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1895 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1896 ((__BASE__) == TIM_DMABASE_CCER) || \
1897 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_tim.h1779 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1780 ((__BASE__) == TIM_DMABASE_CR2) || \
1781 ((__BASE__) == TIM_DMABASE_SMCR) || \
1782 ((__BASE__) == TIM_DMABASE_DIER) || \
1783 ((__BASE__) == TIM_DMABASE_SR) || \
1784 ((__BASE__) == TIM_DMABASE_EGR) || \
1785 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1786 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1787 ((__BASE__) == TIM_DMABASE_CCER) || \
1788 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_tim.h1794 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1795 ((__BASE__) == TIM_DMABASE_CR2) || \
1796 ((__BASE__) == TIM_DMABASE_SMCR) || \
1797 ((__BASE__) == TIM_DMABASE_DIER) || \
1798 ((__BASE__) == TIM_DMABASE_SR) || \
1799 ((__BASE__) == TIM_DMABASE_EGR) || \
1800 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1801 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1802 ((__BASE__) == TIM_DMABASE_CCER) || \
1803 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_tim.h1791 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1792 ((__BASE__) == TIM_DMABASE_CR2) || \
1793 ((__BASE__) == TIM_DMABASE_SMCR) || \
1794 ((__BASE__) == TIM_DMABASE_DIER) || \
1795 ((__BASE__) == TIM_DMABASE_SR) || \
1796 ((__BASE__) == TIM_DMABASE_EGR) || \
1797 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1798 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1799 ((__BASE__) == TIM_DMABASE_CCER) || \
1800 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_tim.h1769 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1770 ((__BASE__) == TIM_DMABASE_CR2) || \
1771 ((__BASE__) == TIM_DMABASE_SMCR) || \
1772 ((__BASE__) == TIM_DMABASE_DIER) || \
1773 ((__BASE__) == TIM_DMABASE_SR) || \
1774 ((__BASE__) == TIM_DMABASE_EGR) || \
1775 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1776 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1777 ((__BASE__) == TIM_DMABASE_CCER) || \
1778 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_tim.h1770 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1771 ((__BASE__) == TIM_DMABASE_CR2) || \
1772 ((__BASE__) == TIM_DMABASE_SMCR) || \
1773 ((__BASE__) == TIM_DMABASE_DIER) || \
1774 ((__BASE__) == TIM_DMABASE_SR) || \
1775 ((__BASE__) == TIM_DMABASE_EGR) || \
1776 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1777 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1778 ((__BASE__) == TIM_DMABASE_CCER) || \
1779 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_tim.h1339 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1340 ((__BASE__) == TIM_DMABASE_CR2) || \
1341 ((__BASE__) == TIM_DMABASE_SMCR) || \
1342 ((__BASE__) == TIM_DMABASE_DIER) || \
1343 ((__BASE__) == TIM_DMABASE_SR) || \
1344 ((__BASE__) == TIM_DMABASE_EGR) || \
1345 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1346 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1347 ((__BASE__) == TIM_DMABASE_CCER) || \
1348 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_tim.h1341 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1342 ((__BASE__) == TIM_DMABASE_CR2) || \
1343 ((__BASE__) == TIM_DMABASE_SMCR) || \
1344 ((__BASE__) == TIM_DMABASE_DIER) || \
1345 ((__BASE__) == TIM_DMABASE_SR) || \
1346 ((__BASE__) == TIM_DMABASE_EGR) || \
1347 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1348 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1349 ((__BASE__) == TIM_DMABASE_CCER) || \
1350 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_tim.h1575 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1576 ((__BASE__) == TIM_DMABASE_CR2) || \
1577 ((__BASE__) == TIM_DMABASE_SMCR) || \
1578 ((__BASE__) == TIM_DMABASE_DIER) || \
1579 ((__BASE__) == TIM_DMABASE_SR) || \
1580 ((__BASE__) == TIM_DMABASE_EGR) || \
1581 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1582 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1583 ((__BASE__) == TIM_DMABASE_CCER) || \
1584 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_tim.h1573 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1574 ((__BASE__) == TIM_DMABASE_CR2) || \
1575 ((__BASE__) == TIM_DMABASE_SMCR) || \
1576 ((__BASE__) == TIM_DMABASE_DIER) || \
1577 ((__BASE__) == TIM_DMABASE_SR) || \
1578 ((__BASE__) == TIM_DMABASE_EGR) || \
1579 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1580 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1581 ((__BASE__) == TIM_DMABASE_CCER) || \
1582 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_tim.h1573 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1574 ((__BASE__) == TIM_DMABASE_CR2) || \
1575 ((__BASE__) == TIM_DMABASE_SMCR) || \
1576 ((__BASE__) == TIM_DMABASE_DIER) || \
1577 ((__BASE__) == TIM_DMABASE_SR) || \
1578 ((__BASE__) == TIM_DMABASE_EGR) || \
1579 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1580 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1581 ((__BASE__) == TIM_DMABASE_CCER) || \
1582 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_tim.h1573 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1574 ((__BASE__) == TIM_DMABASE_CR2) || \
1575 ((__BASE__) == TIM_DMABASE_SMCR) || \
1576 ((__BASE__) == TIM_DMABASE_DIER) || \
1577 ((__BASE__) == TIM_DMABASE_SR) || \
1578 ((__BASE__) == TIM_DMABASE_EGR) || \
1579 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1580 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1581 ((__BASE__) == TIM_DMABASE_CCER) || \
1582 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_tim.h1810 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ argument
1811 ((__BASE__) == TIM_DMABASE_CR2) || \
1812 ((__BASE__) == TIM_DMABASE_SMCR) || \
1813 ((__BASE__) == TIM_DMABASE_DIER) || \
1814 ((__BASE__) == TIM_DMABASE_SR) || \
1815 ((__BASE__) == TIM_DMABASE_EGR) || \
1816 ((__BASE__) == TIM_DMABASE_CCMR1) || \
1817 ((__BASE__) == TIM_DMABASE_CCMR2) || \
1818 ((__BASE__) == TIM_DMABASE_CCER) || \
1819 ((__BASE__) == TIM_DMABASE_CNT) || \
[all …]