Home
last modified time | relevance | path

Searched refs:USB_BASE (Results 1 – 25 of 79) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f070x6.h484 #define USB_BASE (APBPERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base… macro
562 #define USB ((USB_TypeDef *) USB_BASE)
5119 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
5120 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status re…
5121 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number regist…
5122 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regi…
5123 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table addres…
5124 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Sta…
5125 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging de…
5196 #define USB_EP0R USB_BASE /*!< endpoint 0 register ad…
[all …]
Dstm32f070xb.h499 #define USB_BASE (APBPERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base… macro
585 #define USB ((USB_TypeDef *) USB_BASE)
5271 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
5272 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status re…
5273 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number regist…
5274 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regi…
5275 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table addres…
5276 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Sta…
5277 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging de…
5348 #define USB_EP0R USB_BASE /*!< endpoint 0 register ad…
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h731 #define USB ((USB_TypeDef *) USB_BASE)
6859 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
6864 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
6865 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
6866 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
6867 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
6868 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
6869 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
6870 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
6935 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l062xx.h752 #define USB ((USB_TypeDef *) USB_BASE)
6996 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7001 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7002 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7003 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7004 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7005 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7006 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7007 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7072 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l053xx.h747 #define USB ((USB_TypeDef *) USB_BASE)
7018 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7023 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7024 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7025 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7026 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7027 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7028 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7029 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7094 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l072xx.h758 #define USB ((USB_TypeDef *) USB_BASE)
7155 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7160 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7161 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7162 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7163 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7164 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7165 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7166 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7231 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l073xx.h774 #define USB ((USB_TypeDef *) USB_BASE)
7314 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7319 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7320 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7321 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7322 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7323 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7324 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7325 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7390 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l083xx.h795 #define USB ((USB_TypeDef *) USB_BASE)
7451 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7456 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7457 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7458 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7459 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7460 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7461 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7462 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7527 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l063xx.h768 #define USB ((USB_TypeDef *) USB_BASE)
7153 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7158 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7159 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7160 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7161 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7162 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7163 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7164 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7229 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
Dstm32l082xx.h779 #define USB ((USB_TypeDef *) USB_BASE)
7292 #define USB_BASE (0x40005C00U) /*!< USB_IP Peripher… macro
7297 #define USB_CNTR (USB_BASE + 0x40) /*!< Control register */
7298 #define USB_ISTR (USB_BASE + 0x44) /*!< Interrupt status regi…
7299 #define USB_FNR (USB_BASE + 0x48) /*!< Frame number register…
7300 #define USB_DADDR (USB_BASE + 0x4C) /*!< Device address regist…
7301 #define USB_BTABLE (USB_BASE + 0x50) /*!< Buffer Table address …
7302 #define USB_LPMCSR (USB_BASE + 0x54) /*!< LPM Control and Statu…
7303 #define USB_BCDR (USB_BASE + 0x58) /*!< Battery Charging dete…
7368 #define USB_EP0R USB_BASE /*!< endpoint 0 register a…
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h607 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
673 #define USB ((USB_TypeDef *) USB_BASE)
6341 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6342 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6343 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6344 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6345 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6346 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6347 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6348 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l152xba.h592 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
658 #define USB ((USB_TypeDef *) USB_BASE)
6402 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6403 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6404 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6405 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6406 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6407 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6408 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6409 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l100xba.h592 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
657 #define USB ((USB_TypeDef *) USB_BASE)
6387 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6388 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6389 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6390 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6391 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6392 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6393 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6394 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l100xb.h592 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
657 #define USB ((USB_TypeDef *) USB_BASE)
6239 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6240 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6241 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6242 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6243 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6244 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6245 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6246 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xb.h591 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
656 #define USB ((USB_TypeDef *) USB_BASE)
6191 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6192 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6193 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6194 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6195 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6196 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6197 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6198 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xba.h591 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
656 #define USB ((USB_TypeDef *) USB_BASE)
6267 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6268 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6269 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6270 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6271 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6272 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6273 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6274 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l100xc.h621 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
693 #define USB ((USB_TypeDef *) USB_BASE)
6972 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
6973 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
6974 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
6975 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
6976 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
6977 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
6978 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
6979 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xc.h650 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
724 #define USB ((USB_TypeDef *) USB_BASE)
7161 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7162 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7163 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7164 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7165 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7166 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7167 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7168 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xca.h650 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
726 #define USB ((USB_TypeDef *) USB_BASE)
7225 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7226 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7227 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7228 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7229 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7230 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7231 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7232 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xdx.h665 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
743 #define USB ((USB_TypeDef *) USB_BASE)
7290 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7291 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7292 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7293 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7294 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7295 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7296 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7297 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l151xe.h665 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
743 #define USB ((USB_TypeDef *) USB_BASE)
7290 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7291 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7292 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7293 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7294 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7295 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7296 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7297 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l152xc.h666 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
741 #define USB ((USB_TypeDef *) USB_BASE)
7290 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7291 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7292 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7293 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7294 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7295 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7296 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7297 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l152xca.h666 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
743 #define USB ((USB_TypeDef *) USB_BASE)
7375 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7376 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7377 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7378 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7379 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7380 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7381 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7382 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l152xdx.h681 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
760 #define USB ((USB_TypeDef *) USB_BASE)
7440 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7441 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7442 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7443 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7444 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7445 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7446 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7447 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]
Dstm32l152xe.h681 #define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers bas… macro
760 #define USB ((USB_TypeDef *) USB_BASE)
7440 #define USB_EP0R USB_BASE /*!< endpoint 0 regi…
7441 #define USB_EP1R (USB_BASE + 0x00000004U) /*!< endpoint 1 regi…
7442 #define USB_EP2R (USB_BASE + 0x00000008U) /*!< endpoint 2 regi…
7443 #define USB_EP3R (USB_BASE + 0x0000000CU) /*!< endpoint 3 regi…
7444 #define USB_EP4R (USB_BASE + 0x00000010U) /*!< endpoint 4 regi…
7445 #define USB_EP5R (USB_BASE + 0x00000014U) /*!< endpoint 5 regi…
7446 #define USB_EP6R (USB_BASE + 0x00000018U) /*!< endpoint 6 regi…
7447 #define USB_EP7R (USB_BASE + 0x0000001CU) /*!< endpoint 7 regi…
[all …]

1234