USART_IT_MASK (reference) in projects: hal_stm32-latest

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Searched refs:USART_IT_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_hal_usart.h	359 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 481 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 483 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 484 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 500 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 502 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 503 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 543 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
D	stm32f2xx_hal_usart.h	430 …28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 431 …28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 432 … ((__HANDLE__)->Instance->CR3 \|= ((__INTERRUPT__) & USART_IT_MASK))) 433 …8U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 434 …8U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 435 … ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) 451 …_HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) 565 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE \| USART_CR1_TXEIE \| USART_CR1_TCIE \| USART_CR1_RX… macro
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_hal_usart.h	366 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 480 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 482 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 483 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 499 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 501 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 502 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 542 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
D	stm32f1xx_hal_usart.h	430 …28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 431 …28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 432 … ((__HANDLE__)->Instance->CR3 \|= ((__INTERRUPT__) & USART_IT_MASK))) 433 …8U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 434 …8U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 435 … ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) 451 …_HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) 565 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE \| USART_CR1_TXEIE \| USART_CR1_TCIE \| USART_CR1_RX… macro
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
D	stm32f3xx_hal_usart.h	363 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 486 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 488 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 489 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 505 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 507 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 508 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 548 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
D	stm32f4xx_hal_usart.h	430 …28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 431 …28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 432 … ((__HANDLE__)->Instance->CR3 \|= ((__INTERRUPT__) & USART_IT_MASK))) 433 …8U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 434 …8U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 435 … ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) 451 …_HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) 565 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE \| USART_CR1_TXEIE \| USART_CR1_TCIE \| USART_CR1_RX… macro
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
D	stm32l1xx_hal_usart.h	430 …28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 431 …28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 \|= ((__INTERRUPT__) & USART_IT_MASK)): \ 432 … ((__HANDLE__)->Instance->CR3 \|= ((__INTERRUPT__) & USART_IT_MASK))) 433 …8U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 434 …8U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ 435 … ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) 451 …_HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) 565 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE \| USART_CR1_TXEIE \| USART_CR1_TCIE \| USART_CR1_RX… macro
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
D	stm32f7xx_hal_usart.h	359 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 472 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 474 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 475 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 491 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 493 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 494 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 534 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_hal_usart.h	402 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 540 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 542 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 543 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 565 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 567 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 568 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 620 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_hal_usart.h	406 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 542 …USART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 543 …USART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 544 … ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 564 …ART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 565 …ART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 566 … ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 613 …HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & USART_IT_MASK))) != RESET) …
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_hal_usart.h	402 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 540 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 542 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 543 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 565 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 567 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 568 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 620 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_hal_usart.h	414 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 552 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 554 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 555 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 577 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 579 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 580 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 632 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_hal_usart.h	410 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 548 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 550 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 551 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 573 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 575 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 576 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 628 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
D	stm32wb0x_hal_usart.h	402 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 540 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 542 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 543 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 565 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 567 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 568 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 620 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
D	stm32l4xx_hal_usart.h	449 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 591 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 593 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 594 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 616 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 618 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 619 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 671 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_hal_usart.h	411 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 549 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 551 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 552 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 574 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 576 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 577 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 629 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_hal_usart.h	417 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 555 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 557 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 558 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 580 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 582 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 583 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 635 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
D	stm32mp1xx_hal_usart.h	420 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 558 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 560 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 561 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 583 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 585 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 586 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 638 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_hal_usart.h	415 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 553 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 555 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 556 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 578 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 580 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 581 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 633 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_hal_usart.h	414 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 548 …OS) == 1U)? ((__HANDLE__)->Instance->CR1 \|= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 549 …OS) == 2U)? ((__HANDLE__)->Instance->CR2 \|= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 550 … ((__HANDLE__)->Instance->CR3 \|= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK)))) 570 …) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 571 …) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 572 … ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK)))) 620 …HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & USART_IT_MASK))) != 0U) ? S…
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
D	stm32g4xx_hal_usart.h	411 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 549 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 551 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 552 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 574 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 576 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 577 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 629 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_hal_usart.h	415 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 553 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 555 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 556 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 578 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 580 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 581 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 633 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
D	stm32h7xx_hal_usart.h	413 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 551 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 553 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 554 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 576 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 578 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 579 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 631 … USART_IT_MASK))) != 0U) ? SET : RESET)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_hal_usart.h	417 #define USART_IT_MASK 0x001FU /!< USART interruptions flags mask / macro 555 ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 557 ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 558 ((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 580 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 582 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 583 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 635 … USART_IT_MASK))) != 0U) ? SET : RESET)

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