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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h6101 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_ConfigAnalogWDThresholds()
6181 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_SetAnalogWDThresholds()
6220 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_GetAnalogWDThresholds()
6256 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); in LL_ADC_SetAWDFilteringConfiguration()
6281 return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); in LL_ADC_GetAWDFilteringConfiguration()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_adc.h6035 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_ConfigAnalogWDThresholds()
6115 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_SetAnalogWDThresholds()
6154 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_GetAnalogWDThresholds()
6190 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); in LL_ADC_SetAWDFilteringConfiguration()
6215 return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); in LL_ADC_GetAWDFilteringConfiguration()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h6976 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_ConfigAnalogWDThresholds()
7056 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_SetAnalogWDThresholds()
7095 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_GetAnalogWDThresholds()
7131 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); in LL_ADC_SetAWDFilteringConfiguration()
7156 return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); in LL_ADC_GetAWDFilteringConfiguration()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h6095 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_ConfigAnalogWDThresholds()
6175 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_SetAnalogWDThresholds()
6214 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h5772 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_ConfigAnalogWDThresholds()
5852 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_SetAnalogWDThresholds()
5891 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h6182 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_… in LL_ADC_ConfigAnalogWDThresholds()
6263 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_… in LL_ADC_SetAnalogWDThresholds()
6313 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >… in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_adc.c607 MODIFY_REG(ADCx->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32l5xx_hal_adc.c784 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_adc.c607 MODIFY_REG(ADCx->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32l4xx_hal_adc.c784 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_adc.c616 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT | ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32h7rsxx_hal_adc.c784 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
3145 MODIFY_REG(hadc->Instance->TR1, in HAL_ADC_AnalogWDGConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_adc.c660 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT | ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32h5xx_hal_adc.c784 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
3151 MODIFY_REG(hadc->Instance->TR1, in HAL_ADC_AnalogWDGConfig()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_adc.c800 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
3093 MODIFY_REG(hadc->Instance->TR1, in HAL_ADC_AnalogWDGConfig()
Dstm32g4xx_ll_adc.c967 MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT | ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_adc.c717 MODIFY_REG(ADCx->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32wbxx_hal_adc.c1067 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h5419 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET… in LL_ADC_ConfigAnalogWDThresholds()
5483 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET… in LL_ADC_SetAnalogWDThresholds()
5520 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET… in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_adc.c904 MODIFY_REG(ADCx->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32f3xx_hal_adc_ex.c898 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
6830 MODIFY_REG(hadc->Instance->TR1 , in HAL_ADC_AnalogWDGConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h145 #define TR1 AWD1TR macro
Dstm32c031xx.h145 #define TR1 AWD1TR macro
Dstm32c071xx.h150 #define TR1 AWD1TR macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h147 #define TR1 AWD1TR macro

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