Home
last modified time | relevance | path

Searched refs:TIM3_OR1_OCREF_CLR_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0c1xx.h9386 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
9387 #define TIM3_OR1_OCREF_CLR_Msk (0x3UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000003 */
9389 #define TIM3_OR1_OCREF_CLR_0 (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
9390 #define TIM3_OR1_OCREF_CLR_1 (0x2UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000002 */
Dstm32g0b1xx.h9082 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
9083 #define TIM3_OR1_OCREF_CLR_Msk (0x3UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000003 */
9085 #define TIM3_OR1_OCREF_CLR_0 (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
9086 #define TIM3_OR1_OCREF_CLR_1 (0x2UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000002 */
Dstm32g030xx.h6474 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
6475 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g050xx.h6535 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
6536 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g070xx.h6674 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
6675 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g031xx.h6751 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
6752 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g041xx.h7055 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7056 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g051xx.h7150 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7151 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g061xx.h7454 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7455 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g071xx.h7534 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7535 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g081xx.h7838 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7839 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g0b0xx.h7854 #define TIM3_OR1_OCREF_CLR_Pos (0U) macro
7855 #define TIM3_OR1_OCREF_CLR_Msk (0x1UL << TIM3_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */