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Searched refs:TIM3_AF1_ETRSEL_1 (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_tim_ex.h114 #define TIM_TIM3_ETR_COMP2 TIM3_AF1_ETRSEL_1 /*!< TIM3_ETR is co…
117 #define TIM_TIM3_ETR_COMP3 (TIM3_AF1_ETRSEL_1 | TIM3_AF1_ETRSEL_0) /*!< TIM3_ETR is co…
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim_ex.h115 #define TIM_TIM3_ETR_ETH_PPS (TIM3_AF1_ETRSEL_2 | TIM3_AF1_ETRSEL_1) /* !< …
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h6483 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g050xx.h6544 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g070xx.h6683 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g031xx.h6760 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g041xx.h7064 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g051xx.h7159 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g061xx.h7463 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g071xx.h7543 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g081xx.h7847 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0b0xx.h7863 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0c1xx.h9397 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0b1xx.h9093 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18452 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b0xx.h18932 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b0xxq.h18944 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7a3xxq.h18464 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b3xx.h18939 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b3xxq.h18951 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h730xxq.h20632 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h733xx.h20620 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h725xx.h20145 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h730xx.h20620 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h735xx.h20632 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro

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