Searched refs:TIM1_OR2_ETRSEL_2 (Results 1 – 25 of 28) sorted by relevance
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1000 #define LL_TIM_ETRSOURCE_ADC1_AWD2 TIM1_OR2_ETRSEL_2 /*!< ETR inp…1001 #define LL_TIM_ETRSOURCE_ADC1_AWD3 (TIM1_OR2_ETRSEL_2 | TIM1_OR2_ETRSEL_0) /*!< ETR inp…
8752 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
8527 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13233 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13341 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
12399 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13004 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
12174 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13458 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14359 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13419 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
13644 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14523 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14680 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14899 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14748 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
16230 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
15890 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
16364 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
16863 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
16711 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
17210 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
17364 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
14878 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro
15617 #define TIM1_OR2_ETRSEL_2 (0x4UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00010000 */ macro