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Searched refs:TIM1_OR1_OCREF_CLR_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0c1xx.h9303 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
9304 #define TIM1_OR1_OCREF_CLR_Msk (0x3UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000003 */
9306 #define TIM1_OR1_OCREF_CLR_0 (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
9307 #define TIM1_OR1_OCREF_CLR_1 (0x2UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000002 */
Dstm32g0b1xx.h8999 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
9000 #define TIM1_OR1_OCREF_CLR_Msk (0x3UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000003 */
9002 #define TIM1_OR1_OCREF_CLR_0 (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
9003 #define TIM1_OR1_OCREF_CLR_1 (0x2UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000002 */
Dstm32g030xx.h6420 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
6421 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g050xx.h6481 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
6482 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g070xx.h6620 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
6621 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g031xx.h6684 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
6685 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g041xx.h6988 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
6989 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g051xx.h7083 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
7084 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g061xx.h7387 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
7388 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g071xx.h7467 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
7468 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g081xx.h7771 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
7772 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */
Dstm32g0b0xx.h7800 #define TIM1_OR1_OCREF_CLR_Pos (0U) macro
7801 #define TIM1_OR1_OCREF_CLR_Msk (0x1UL << TIM1_OR1_OCREF_CLR_Pos) /*!< 0x00000001 */