Searched refs:TIM1_OR1_ETR_ADC_RMP_0 (Results 1 – 7 of 7) sorted by relevance
89 #define TIM_TIM1_ETR_ADC_AWD1 TIM1_OR1_ETR_ADC_RMP_0 /*!< TIM1…91 #define TIM_TIM1_ETR_ADC_AWD3 (TIM1_OR1_ETR_ADC_RMP_0 | TIM1_OR1_ETR_ADC_RMP_1) /*!< TIM1…
1183 #define LL_TIM_TIM1_ETR_ADC_RMP_AWD1 (TIM1_OR1_ETR_ADC_RMP_0 | TIM1_OR1_RMP_MASK) …
9331 #define TIM1_OR1_ETR_ADC_RMP_0 (0x1UL << TIM1_OR1_ETR_ADC_RMP_Pos) /*!< 0x00000001 */ macro
11003 #define TIM1_OR1_ETR_ADC_RMP_0 (0x1UL << TIM1_OR1_ETR_ADC_RMP_Pos) /*!< 0x00000001 */ macro