Home
last modified time | relevance | path

Searched refs:SVMCR1 (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_pwr.h724 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4SV); in LL_PWR_EnableVddIO4()
734 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4SV); in LL_PWR_DisableVddIO4()
744 return ((READ_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4SV) == (PWR_SVMCR1_VDDIO4SV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO4()
904 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VMEN); in LL_PWR_EnableVddIO4Monitoring()
914 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VMEN); in LL_PWR_DisableVddIO4Monitoring()
924 return ((READ_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VMEN) == (PWR_SVMCR1_VDDIO4VMEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO4Monitoring()
1114 MODIFY_REG(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSEL, (VoltageRange << PWR_SVMCR1_VDDIO4VRSEL_Pos)); in LL_PWR_SetVddIO4VoltageRange()
1126 return (uint32_t)(READ_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSEL) >> PWR_SVMCR1_VDDIO4VRSEL_Pos); in LL_PWR_GetVddIO4VoltageRange()
1164 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSTBY); in LL_PWR_EnableVddIO4VoltageRangeSB()
1174 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSTBY); in LL_PWR_DisableVddIO4VoltageRangeSB()
[all …]
Dstm32n6xx_hal_pwr.h347 …((__FLAG__) == PWR_FLAG_VDDIO4RDY) ? ((PWR->SVMCR1 & PWR_SVMCR1_VDDIO4RDY) == PWR_SVMCR1_VDDIO4RDY…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_pwr_ex.c892 MODIFY_REG(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSEL, VoltageRange << PWR_SVMCR1_VDDIO4VRSEL_Pos); in HAL_PWREx_ConfigVddIORange()
939 voltage_range = (READ_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSEL) >> PWR_SVMCR1_VDDIO4VRSEL_Pos); in HAL_PWREx_GetVddIORange()
964 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSTBY); in HAL_PWREx_EnableVddIO4RangeSTBY()
973 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VRSTBY); in HAL_PWREx_DisableVddIO4RangeSTBY()
1065 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4SV); in HAL_PWREx_EnableVddIO4()
1074 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4SV); in HAL_PWREx_DisableVddIO4()
1175 SET_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VMEN); in HAL_PWREx_EnableVddIO4VMEN()
1184 CLEAR_BIT(PWR->SVMCR1, PWR_SVMCR1_VDDIO4VMEN); in HAL_PWREx_DisableVddIO4VMEN()
Dstm32n6xx_ll_pwr.c66 WRITE_REG(PWR->SVMCR1, 0x00000000U); in LL_PWR_DeInit()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h1867 …__IO uint32_t SVMCR1; /*!< PWR Supply voltage monitoring control register 1 Address offse… member
Dstm32n657xx.h1993 …__IO uint32_t SVMCR1; /*!< PWR Supply voltage monitoring control register 1 Address offse… member
Dstm32n655xx.h1965 …__IO uint32_t SVMCR1; /*!< PWR Supply voltage monitoring control register 1 Address offse… member
Dstm32n647xx.h1895 …__IO uint32_t SVMCR1; /*!< PWR Supply voltage monitoring control register 1 Address offse… member