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Searched refs:SRAM1_BASE_NS (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dsystem_stm32l5xx_ns.c98 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE_NS /*!< Vector Table base address field.
Dstm32l552xx.h1346 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
2489 #define SRAM1_BASE SRAM1_BASE_NS
2491 #define SRAM_BASE SRAM1_BASE_NS
Dstm32l562xx.h1420 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
2612 #define SRAM1_BASE SRAM1_BASE_NS
2614 #define SRAM_BASE SRAM1_BASE_NS
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c704 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
849 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c852 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
947 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c1054 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1199 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c1125 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1306 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h885 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
1044 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32wba52xx.h983 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
1502 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32wba54xx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
1605 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32wba5mxx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
1605 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32wba55xx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
1605 #define SRAM1_BASE SRAM1_BASE_NS
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h1178 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (16 KB) non-secure base address … macro
1454 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32h523xx.h1482 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (128 KB) non-secure base address … macro
2580 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32h562xx.h1571 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
2843 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32h533xx.h1546 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (128 KB) non-secure base address … macro
2718 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32h573xx.h1813 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
3190 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32h563xx.h1749 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
3052 #define SRAM1_BASE SRAM1_BASE_NS
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1517 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
2626 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u535xx.h1439 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
2488 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u575xx.h1653 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
2843 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u585xx.h1732 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
3016 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u595xx.h1704 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
2952 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u5a5xx.h1783 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
3125 #define SRAM1_BASE SRAM1_BASE_NS
Dstm32u5f7xx.h1867 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
3206 #define SRAM1_BASE SRAM1_BASE_NS

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