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Searched refs:RCC_PLL1DIVR_PLL1R (Results 1 – 25 of 37) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c888 …(((tmpreg2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) != (RCC_OscInitStruct->PLL1.PLLR - 1u)… in HAL_RCC_OscConfig()
1425 pllr = ((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in HAL_RCC_GetPLL1RFreq()
1506 RCC_OscInitStruct->PLL1.PLLR = (((regvalue & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h2311 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1R()
2461 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
2472 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1282 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1797 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); in HAL_RCC_GetSysClockFreq()
1944 …pRCC_OscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Po… in HAL_RCC_GetOscConfig()
Dstm32u5xx_hal_rcc_ex.c1560RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + \ in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dsystem_stm32u5xx.c335 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
Dsystem_stm32u5xx_s.c358 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
Dstm32u545xx.h14607 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
Dstm32u535xx.h14094 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dsystem_stm32wbaxx.c320 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
Dsystem_stm32wbaxx_s.c342 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
Dstm32wba50xx.h6063 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32wba52xx.h9837 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32wba54xx.h10109 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32wba5mxx.h10127 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32wba55xx.h10127 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c961 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1608 …pOscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) +… in HAL_RCC_GetOscConfig()
Dstm32h5xx_hal_rcc_ex.c2876RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h3894 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SYS()
4065 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4077 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
Dstm32u5xx_hal_rcc.h4457 RCC_PLL1DIVR_PLL1R), ( (((__PLL1N__) - 1U ) & RCC_PLL1DIVR_PLL1N) |\
4463 RCC_PLL1DIVR_PLL1R))); \
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4436 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4447 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
Dstm32h5xx_hal_rcc.h4583 … ((((__PLL1R__) - 1U) << RCC_PLL1DIVR_PLL1R_Pos) & RCC_PLL1DIVR_PLL1R))); \
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8591 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32h523xx.h12767 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32h562xx.h13447 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
Dstm32h533xx.h13286 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro

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