Home
last modified time | relevance | path

Searched refs:RCC_PLL1DIVR_PLL1N (Results 1 – 25 of 39) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dsystem_stm32h5xx.c354 … ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
359 …((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
364 …((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
Dsystem_stm32h5xx_s.c368 … ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
373 …((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
378 …((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in SystemCoreClockUpdate()
Dstm32h503xx.h8559 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32h523xx.h12735 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32h562xx.h13415 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c956 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1N) != (pOscInitStruct->PLL.PLLN - 1U)) || in HAL_RCC_OscConfig()
1446 … ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1451 …((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1458 …((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1465 …((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1606 …pOscInitStruct->PLL.PLLN = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) +… in HAL_RCC_GetOscConfig()
Dstm32h5xx_hal_rcc_ex.c2792 pll1n = (RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N); in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h2311 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1R()
2334 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1P()
2357 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1Q, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1Q()
2394 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N, (PLL1N - 1UL) << RCC_PLL1DIVR_PLL1N_Pos); in LL_RCC_PLL1_SetN()
2404 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) + 1UL); in LL_RCC_PLL1_GetN()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1277 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1N) != (pRCC_OscInitStruct->PLL.PLLN - 1U)) || in HAL_RCC_OscConfig()
1781 …((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1786 …((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1792 …((float_t) msirange / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCC_GetSysClockFreq()
1942 …pRCC_OscInitStruct->PLL.PLLN = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Po… in HAL_RCC_GetOscConfig()
Dstm32u5xx_hal_rcc_ex.c1507 pll1n = (RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N); in HAL_RCCEx_GetPLL1ClockFreq()
1518 …(float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCCEx_GetPLL1ClockFreq()
1526 …(float_t)HSE_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + \ in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c885 …(((tmpreg2 & RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) != (RCC_OscInitStruct->PLL1.PLLN - 1u)… in HAL_RCC_OscConfig()
1504 RCC_OscInitStruct->PLL1.PLLN = ((regvalue & RCC_PLL1DIVR_PLL1N) + 1U); in HAL_RCC_GetOscConfig()
1769 tmp = (tmpreg1 & RCC_PLL1DIVR_PLL1N) + 1U; in RCC_PLL1_GetVCOOutputFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h3894 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SYS()
3922 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SAI()
3950 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1Q, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_48M()
3994 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N, (PLL1N - 1UL) << RCC_PLL1DIVR_PLL1N_Pos); in LL_RCC_PLL1_SetN()
4005 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) + 1UL); in LL_RCC_PLL1_GetN()
Dstm32u5xx_hal_rcc.h4456 MODIFY_REG(RCC->PLL1DIVR ,(RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P | RCC_PLL1DIVR_PLL1Q |\
4457 RCC_PLL1DIVR_PLL1R), ( (((__PLL1N__) - 1U ) & RCC_PLL1DIVR_PLL1N) |\
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dsystem_stm32u5xx.c334 …pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1/(float_t)0x20… in SystemCoreClockUpdate()
Dsystem_stm32u5xx_s.c357 …pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1/(float_t)0x20… in SystemCoreClockUpdate()
Dstm32u545xx.h14575 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk /*!< PLL1N[8:0]… macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dsystem_stm32wbaxx.c319 plln = (tmp2 & RCC_PLL1DIVR_PLL1N) + 1U; in SystemCoreClockUpdate()
Dsystem_stm32wbaxx_s.c341 plln = (tmp2 & RCC_PLL1DIVR_PLL1N) + 1U; in SystemCoreClockUpdate()
Dstm32wba50xx.h6031 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32wba52xx.h9805 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32wba54xx.h10077 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32wba5mxx.h10095 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
Dstm32wba55xx.h10095 #define RCC_PLL1DIVR_PLL1N RCC_PLL1DIVR_PLL1N_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4330 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, \ in LL_RCC_PLL1_ConfigDomain_SYS()
4370 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N, (PLL1N - 1UL) << RCC_PLL1DIVR_PLL1N_Pos); in LL_RCC_PLL1_SetN()
4380 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) + 1UL); in LL_RCC_PLL1_GetN()
Dstm32h5xx_hal_rcc.h4580 WRITE_REG(RCC->PLL1DIVR , ( (((__PLL1N__) - 1U ) & RCC_PLL1DIVR_PLL1N) | \

12