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Searched refs:RCC_CSR_RTCEN_Pos (Results 1 – 25 of 42) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h115 #define RCC_RTCEN_BIT_NUMBER RCC_CSR_RTCEN_Pos
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3981 #define RCC_CSR_RTCEN_Pos (18U) macro
3982 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l010x8.h3678 #define RCC_CSR_RTCEN_Pos (18U) macro
3679 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l010xb.h3707 #define RCC_CSR_RTCEN_Pos (18U) macro
3708 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l011xx.h3743 #define RCC_CSR_RTCEN_Pos (18U) macro
3744 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l021xx.h3880 #define RCC_CSR_RTCEN_Pos (18U) macro
3881 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l031xx.h3844 #define RCC_CSR_RTCEN_Pos (18U) macro
3845 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l051xx.h3972 #define RCC_CSR_RTCEN_Pos (18U) macro
3973 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l010x4.h3634 #define RCC_CSR_RTCEN_Pos (18U) macro
3635 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l010x6.h3667 #define RCC_CSR_RTCEN_Pos (18U) macro
3668 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l081xx.h4224 #define RCC_CSR_RTCEN_Pos (18U) macro
4225 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l071xx.h4087 #define RCC_CSR_RTCEN_Pos (18U) macro
4088 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l052xx.h4335 #define RCC_CSR_RTCEN_Pos (18U) macro
4336 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l062xx.h4472 #define RCC_CSR_RTCEN_Pos (18U) macro
4473 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l053xx.h4488 #define RCC_CSR_RTCEN_Pos (18U) macro
4489 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l072xx.h4554 #define RCC_CSR_RTCEN_Pos (18U) macro
4555 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l073xx.h4705 #define RCC_CSR_RTCEN_Pos (18U) macro
4706 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l083xx.h4842 #define RCC_CSR_RTCEN_Pos (18U) macro
4843 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
Dstm32l063xx.h4623 #define RCC_CSR_RTCEN_Pos (18U) macro
4624 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00040000 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h4506 #define RCC_CSR_RTCEN_Pos (22U) macro
4507 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */
Dstm32l152xba.h4521 #define RCC_CSR_RTCEN_Pos (22U) macro
4522 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */
Dstm32l100xba.h4506 #define RCC_CSR_RTCEN_Pos (22U) macro
4507 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */
Dstm32l100xb.h4479 #define RCC_CSR_RTCEN_Pos (22U) macro
4480 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */
Dstm32l151xb.h4364 #define RCC_CSR_RTCEN_Pos (22U) macro
4365 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */
Dstm32l151xba.h4394 #define RCC_CSR_RTCEN_Pos (22U) macro
4395 #define RCC_CSR_RTCEN_Msk (0x1UL << RCC_CSR_RTCEN_Pos) /*!< 0x00400000 */

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