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Searched refs:RCC_CSR_OBLRSTF_Pos (Results 1 – 25 of 167) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h640 #define RCC_FLAG_OBLRST ((uint8_t)((CSR_REG_INDEX << 5) | RCC_CSR_OBLRSTF_Pos)) /…
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h732 #define RCC_FLAG_OBLRST ((CSR_REG_INDEX << REG_INDEX_POS) | RCC_CSR_OBLRSTF_Pos) …
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h611 #define RCC_FLAG_OBLRST ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos)) …
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h475 #define RCC_FLAG_OBLRST ((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos) /*!< Option …
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3176 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3177 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f030x8.h3220 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3221 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f070x6.h3247 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3248 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f031x6.h3305 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3306 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f030xc.h3522 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3523 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f038xx.h3277 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3278 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f070xb.h3381 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3382 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f058xx.h3758 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3759 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32f051x8.h3786 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3787 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3994 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3995 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l010x8.h3688 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3689 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l010xb.h3717 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3718 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l011xx.h3753 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3754 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l021xx.h3890 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3891 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l031xx.h3857 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3858 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l051xx.h3985 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3986 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l010x4.h3644 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3645 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l010x6.h3677 #define RCC_CSR_OBLRSTF_Pos (25U) macro
3678 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l081xx.h4237 #define RCC_CSR_OBLRSTF_Pos (25U) macro
4238 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
Dstm32l071xx.h4100 #define RCC_CSR_OBLRSTF_Pos (25U) macro
4101 #define RCC_CSR_OBLRSTF_Msk (0x1UL << RCC_CSR_OBLRSTF_Pos) /*!< 0x02000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h823 #define RCC_FLAG_OBLRST ((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos) /*!< Option …

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