Home
last modified time | relevance | path

Searched refs:RCC_CFGR_MCOPRE_DIV4 (Results 1 – 25 of 109) sorted by relevance

12345

/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h270 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO Clock divided by 4 */
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h293 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO Clock divided by 4 */
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h327 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO Clock divided by 4 */
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h287 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO Clock divided by 4 */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h293 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO divided by 4 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3533 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3553 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l010x8.h3236 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3256 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l010xb.h3244 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3264 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l011xx.h3333 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3353 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l021xx.h3461 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3481 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l031xx.h3405 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3425 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l051xx.h3477 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3497 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l010x4.h3224 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3244 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l010x6.h3237 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3257 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l081xx.h3657 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3677 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l071xx.h3529 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3549 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l052xx.h3778 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3798 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l062xx.h3906 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3926 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
Dstm32l053xx.h3922 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3942 #define RCC_CFGR_MCO_PRE_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO is divided by 1 */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h364 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO divided by 4 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h4075 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
4082 #define RCC_CFGR_MCO_DIV4 RCC_CFGR_MCOPRE_DIV4
Dstm32l152xba.h4074 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
4081 #define RCC_CFGR_MCO_DIV4 RCC_CFGR_MCOPRE_DIV4
Dstm32l100xba.h4068 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
4075 #define RCC_CFGR_MCO_DIV4 RCC_CFGR_MCOPRE_DIV4
Dstm32l100xb.h4057 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
4064 #define RCC_CFGR_MCO_DIV4 RCC_CFGR_MCOPRE_DIV4
Dstm32l151xb.h3942 #define RCC_CFGR_MCOPRE_DIV4 (0x20000000U) /*!< MCO is divided … macro
3949 #define RCC_CFGR_MCO_DIV4 RCC_CFGR_MCOPRE_DIV4

12345