Home
last modified time | relevance | path

Searched refs:RCC_CFGR_MCOPRE_DIV16 (Results 1 – 25 of 109) sorted by relevance

12345

/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h272 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h295 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h329 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h289 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h295 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO divided by 16 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3535 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3555 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l010x8.h3238 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3258 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l010xb.h3246 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3266 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l011xx.h3335 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3355 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l021xx.h3463 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3483 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l031xx.h3407 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3427 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l051xx.h3479 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3499 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l010x4.h3226 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3246 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l010x6.h3239 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3259 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l081xx.h3659 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3679 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l071xx.h3531 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3551 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l052xx.h3780 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3800 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l062xx.h3908 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3928 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
Dstm32l053xx.h3924 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3944 #define RCC_CFGR_MCO_PRE_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO is divided by 1 */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h366 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO divided by 16 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h4077 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
4084 #define RCC_CFGR_MCO_DIV16 RCC_CFGR_MCOPRE_DIV16
Dstm32l152xba.h4076 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
4083 #define RCC_CFGR_MCO_DIV16 RCC_CFGR_MCOPRE_DIV16
Dstm32l100xba.h4070 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
4077 #define RCC_CFGR_MCO_DIV16 RCC_CFGR_MCOPRE_DIV16
Dstm32l100xb.h4059 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
4066 #define RCC_CFGR_MCO_DIV16 RCC_CFGR_MCOPRE_DIV16
Dstm32l151xb.h3944 #define RCC_CFGR_MCOPRE_DIV16 (0x40000000U) /*!< MCO is divided … macro
3951 #define RCC_CFGR_MCO_DIV16 RCC_CFGR_MCOPRE_DIV16

12345