Searched refs:RCC_CFGR2_ADC1PRES_DIV8 (Results 1 – 5 of 5) sorted by relevance
480 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_8 RCC_CFGR2_ADC1PRES_DIV8 /*!< ADC1 PLL clock divided by 8…
1221 #define RCC_ADC1PLLCLK_DIV8 RCC_CFGR2_ADC1PRES_DIV8
5261 #define RCC_CFGR2_ADC1PRES_DIV8 (0x00000140U) /*!< ADC1 PLL clock … macro
5251 #define RCC_CFGR2_ADC1PRES_DIV8 (0x00000140U) /*!< ADC1 PLL clock … macro
8889 #define RCC_CFGR2_ADC1PRES_DIV8 (0x00000140U) /*!< ADC1 PLL clock … macro
