Searched refs:RCC_CFGR2_ADC1PRES_DIV64 (Results 1 – 5 of 5) sorted by relevance
485 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_64 RCC_CFGR2_ADC1PRES_DIV64 /*!< ADC1 PLL clock divided by 6…
1226 #define RCC_ADC1PLLCLK_DIV64 RCC_CFGR2_ADC1PRES_DIV64
5266 #define RCC_CFGR2_ADC1PRES_DIV64 (0x00000190U) /*!< ADC1 PLL clock … macro
5256 #define RCC_CFGR2_ADC1PRES_DIV64 (0x00000190U) /*!< ADC1 PLL clock … macro
8894 #define RCC_CFGR2_ADC1PRES_DIV64 (0x00000190U) /*!< ADC1 PLL clock … macro
