Searched refs:RCC_CFGR2_ADC1PRES_DIV4 (Results 1 – 5 of 5) sorted by relevance
478 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_4 RCC_CFGR2_ADC1PRES_DIV4 /*!< ADC1 PLL clock divided by 4…
1219 #define RCC_ADC1PLLCLK_DIV4 RCC_CFGR2_ADC1PRES_DIV4
5259 #define RCC_CFGR2_ADC1PRES_DIV4 (0x00000120U) /*!< ADC1 PLL clock … macro
5249 #define RCC_CFGR2_ADC1PRES_DIV4 (0x00000120U) /*!< ADC1 PLL clock … macro
8887 #define RCC_CFGR2_ADC1PRES_DIV4 (0x00000120U) /*!< ADC1 PLL clock … macro