Searched refs:RCC_CFGR2_ADC1PRES_DIV32 (Results 1 – 5 of 5) sorted by relevance
484 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_32 RCC_CFGR2_ADC1PRES_DIV32 /*!< ADC1 PLL clock divided by 3…
1225 #define RCC_ADC1PLLCLK_DIV32 RCC_CFGR2_ADC1PRES_DIV32
5265 #define RCC_CFGR2_ADC1PRES_DIV32 (0x00000180U) /*!< ADC1 PLL clock … macro
5255 #define RCC_CFGR2_ADC1PRES_DIV32 (0x00000180U) /*!< ADC1 PLL clock … macro
8893 #define RCC_CFGR2_ADC1PRES_DIV32 (0x00000180U) /*!< ADC1 PLL clock … macro