Searched refs:RCC_CFGR2_ADC1PRES_DIV256 (Results 1 – 5 of 5) sorted by relevance
487 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_256 RCC_CFGR2_ADC1PRES_DIV256 /*!< ADC1 PLL clock divided by 2…
1228 #define RCC_ADC1PLLCLK_DIV256 RCC_CFGR2_ADC1PRES_DIV256
5268 #define RCC_CFGR2_ADC1PRES_DIV256 (0x000001B0U) /*!< ADC1 PLL clock … macro
5258 #define RCC_CFGR2_ADC1PRES_DIV256 (0x000001B0U) /*!< ADC1 PLL clock … macro
8896 #define RCC_CFGR2_ADC1PRES_DIV256 (0x000001B0U) /*!< ADC1 PLL clock … macro
