Searched refs:RCC_CFGR2_ADC1PRES_DIV128 (Results 1 – 5 of 5) sorted by relevance
486 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_128 RCC_CFGR2_ADC1PRES_DIV128 /*!< ADC1 PLL clock divided by 1…
1227 #define RCC_ADC1PLLCLK_DIV128 RCC_CFGR2_ADC1PRES_DIV128
5267 #define RCC_CFGR2_ADC1PRES_DIV128 (0x000001A0U) /*!< ADC1 PLL clock … macro
5257 #define RCC_CFGR2_ADC1PRES_DIV128 (0x000001A0U) /*!< ADC1 PLL clock … macro
8895 #define RCC_CFGR2_ADC1PRES_DIV128 (0x000001A0U) /*!< ADC1 PLL clock … macro
