Searched refs:RCC_CFGR2_ADC1PRES_DIV1 (Results 1 – 5 of 5) sorted by relevance
476 #define LL_RCC_ADC1_CLKSRC_PLL_DIV_1 RCC_CFGR2_ADC1PRES_DIV1 /*!< ADC1 PLL clock divided by 1…
1217 #define RCC_ADC1PLLCLK_DIV1 RCC_CFGR2_ADC1PRES_DIV1
5257 #define RCC_CFGR2_ADC1PRES_DIV1 (0x00000100U) /*!< ADC1 PLL clock … macro
5247 #define RCC_CFGR2_ADC1PRES_DIV1 (0x00000100U) /*!< ADC1 PLL clock … macro
8885 #define RCC_CFGR2_ADC1PRES_DIV1 (0x00000100U) /*!< ADC1 PLL clock … macro