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Searched refs:RCC_APBENR1_SPI3EN (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h946 SET_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN); \
948 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN); \
1100 #define __HAL_RCC_SPI3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN)
1310 #define __HAL_RCC_SPI3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN) != 0…
1372 #define __HAL_RCC_SPI3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN) == 0…
Dstm32u0xx_ll_bus.h118 #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APBENR1_SPI3EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1089 SET_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN); \
1091 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN); \
1387 #define __HAL_RCC_SPI3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN)
1552 #define __HAL_RCC_SPI3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN) != 0U)
1616 #define __HAL_RCC_SPI3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_SPI3EN) == 0U)
Dstm32g0xx_ll_bus.h131 #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APBENR1_SPI3EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h5541 #define RCC_APBENR1_SPI3EN RCC_APBENR1_SPI3EN_Msk macro
Dstm32g0c1xx.h6835 #define RCC_APBENR1_SPI3EN RCC_APBENR1_SPI3EN_Msk macro
Dstm32g0b1xx.h6587 #define RCC_APBENR1_SPI3EN RCC_APBENR1_SPI3EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u083xx.h6215 #define RCC_APBENR1_SPI3EN RCC_APBENR1_SPI3EN_Msk macro
Dstm32u073xx.h5951 #define RCC_APBENR1_SPI3EN RCC_APBENR1_SPI3EN_Msk macro