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Searched refs:RCC_APB2ENR_USART1EN (Results 1 – 25 of 259) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc.h559 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
561 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
574 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
604 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
605 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
Dstm32f1xx_ll_bus.h218 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h841 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
843 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
860 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
879 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
887 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
Dstm32f0xx_ll_bus.h169 #define LL_APB1_GRP2_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc.h571 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
573 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
620 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
639 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
648 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
Dstm32f4xx_ll_bus.h278 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h878 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
880 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
888 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
964 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
970 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
Dstm32f3xx_ll_bus.h198 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h897 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
899 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
909 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
1190 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != 0U)
1197 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == 0U)
Dstm32l1xx_ll_bus.h159 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h924 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
926 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1002 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
1026 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR &(RCC_APB2ENR_USART1EN))!= RESET)
1040 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR &(RCC_APB2ENR_USART1EN))== RESET)
Dstm32f2xx_ll_bus.h163 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h946 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
948 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
987 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
1170 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc_ex.h861 #define __HAL_RCC_USART1_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN))
869 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN))
881 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
889 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN) == 0U)
Dstm32l0xx_ll_bus.h158 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN /*!< USART1 clock enable */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h1133 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1135 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1209 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
1542 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
1573 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == 0U)
Dstm32g4xx_ll_bus.h192 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1276 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1278 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1340 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
1630 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
1653 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == 0U)
Dstm32l5xx_ll_bus.h176 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1506 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1508 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1604 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
2113 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
2158 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == 0U)
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2192 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
2194 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
2322 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR) &= ~ (RCC_APB2ENR_USART1EN)
2356 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & RCC_APB2ENR_USART1EN) != 0U)
2384 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & RCC_APB2ENR_USART1EN) == 0U)
3392 SET_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_USART1EN);\
3394 tmpreg = READ_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_USART1EN);\
3496 #define __HAL_RCC_C1_USART1_CLK_DISABLE() (RCC_C1->APB2ENR) &= ~ (RCC_APB2ENR_USART1EN)
4422 SET_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_USART1EN);\
4424 tmpreg = READ_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_USART1EN);\
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1224 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1226 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1406 #define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
1665 #define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
1706 #define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
Dstm32f7xx_ll_bus.h201 #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1733 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1735 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1827 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
2469 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
2505 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == 0U)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1680 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1682 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1775 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
2567 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
2609 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == 0U)

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