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Searched refs:RCC_APB2ENR_SPI4EN (Results 1 – 25 of 88) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1575 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1577 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1588 #define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
1638 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
1642 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
2563 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2565 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2577 #define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
2594 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
2601 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
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Dstm32f4xx_ll_bus.h300 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2423 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2425 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2429 #define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
2685 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
2687 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
Dstm32f3xx_ll_bus.h200 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h1142 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN); \
1144 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN); \
1212 #define __HAL_RCC_SPI4_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN)
1545 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) != 0U)
1576 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) == 0U)
Dstm32g4xx_ll_bus.h194 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2236 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2238 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
2331 #define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR) &= ~ (RCC_APB2ENR_SPI4EN)
2365 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & RCC_APB2ENR_SPI4EN) != 0U)
2393 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & RCC_APB2ENR_SPI4EN) == 0U)
3416 SET_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SPI4EN);\
3418 tmpreg = READ_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SPI4EN);\
3499 #define __HAL_RCC_C1_SPI4_CLK_DISABLE() (RCC_C1->APB2ENR) &= ~ (RCC_APB2ENR_SPI4EN)
4446 SET_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SPI4EN);\
4448 tmpreg = READ_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SPI4EN);\
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Dstm32h7xx_ll_bus.h330 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1291 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1293 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1417 #define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
1672 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
1713 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
Dstm32f7xx_ll_bus.h211 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1719 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN); \
1721 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN); \
1790 #define __HAL_RCC_SPI4_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN)
2582 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) != 0U)
2624 #define __HAL_RCC_SPI4_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) == 0U)
Dstm32h5xx_ll_bus.h322 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h208 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
Dstm32h7rsxx_hal_rcc.h1667 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1735 #define __HAL_RCC_SPI4_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN)
2153 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) != 0U)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h306 #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h4361 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32f401xe.h4361 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32f411xe.h4373 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32f412cx.h8846 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32f423xx.h10160 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xe.h10566 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk /*!< SPI4 clock enab… macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g473xx.h8911 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32g471xx.h8373 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9760 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro
Dstm32f722xx.h9741 #define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk macro

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