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Searched refs:RCC_AHBSMENR_CRCSMEN (Results 1 – 25 of 41) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h939 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_CRCSMEN))
944 #define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_CRCSMEN))
1018 #define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) != 0…
1022 #define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) == 0…
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h1269 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
1274 #define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
1404 #define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) !=…
1409 #define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) =…
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1946 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
1959 #define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
2193 #define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) !=…
2206 #define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) =…
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1754 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
1774 #define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN)
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3848 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l010x8.h3551 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l010xb.h3577 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l011xx.h3616 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l021xx.h3750 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l031xx.h3714 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l051xx.h3822 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l010x4.h3507 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l010x6.h3540 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l081xx.h4050 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l071xx.h3916 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l052xx.h4162 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l062xx.h4296 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l053xx.h4312 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l072xx.h4360 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l073xx.h4508 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l083xx.h4642 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
Dstm32l063xx.h4444 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk /*!< CRC clock enabl… macro
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4159 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk macro
Dstm32c031xx.h4322 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk macro
Dstm32c071xx.h4790 #define RCC_AHBSMENR_CRCSMEN RCC_AHBSMENR_CRCSMEN_Msk macro

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