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Searched refs:RCC_AHB2ENR_RNGEN (Results 1 – 25 of 125) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1223 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
1225 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
1228 #define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
1254 #define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
1255 #define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
2241 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
2243 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
2246 #define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
2292 #define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
2293 #define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
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Dstm32f4xx_ll_bus.h151 #if defined(RCC_AHB2ENR_RNGEN)
152 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h587 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
589 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
594 #define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
607 #define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR &(RCC_AHB2ENR_RNGEN)) != RESET)
610 #define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR &(RCC_AHB2ENR_RNGEN)) == RESET)
Dstm32f2xx_ll_bus.h111 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h703 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
705 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
753 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN)
1101 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != 0U)
Dstm32wbaxx_ll_bus.h96 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h720 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
722 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
763 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN)
1319 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != 0U)
1358 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == 0U)
Dstm32g4xx_ll_bus.h113 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h828 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
830 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
885 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN)
1433 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != 0U)
1463 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == 0U)
Dstm32l5xx_ll_bus.h103 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h884 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
886 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
971 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN)
1753 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != 0U)
1818 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == 0U)
Dstm32l4xx_ll_bus.h128 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1191 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
1193 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
1303 #define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~ (RCC_AHB2ENR_RNGEN))
1349 #define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & RCC_AHB2ENR_RNGEN) != 0U)
1389 #define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & RCC_AHB2ENR_RNGEN) == 0U)
2852 SET_BIT(RCC_C1->AHB2ENR, RCC_AHB2ENR_RNGEN);\
2854 tmpreg = READ_BIT(RCC_C1->AHB2ENR, RCC_AHB2ENR_RNGEN);\
2897 #define __HAL_RCC_C1_RNG_CLK_DISABLE() (RCC_C1->AHB2ENR &= ~ (RCC_AHB2ENR_RNGEN))
3882 SET_BIT(RCC_C2->AHB2ENR, RCC_AHB2ENR_RNGEN);\
3884 tmpreg = READ_BIT(RCC_C2->AHB2ENR, RCC_AHB2ENR_RNGEN);\
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Dstm32h7xx_ll_bus.h160 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h837 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
839 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
852 #define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
1537 #define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
1540 #define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
Dstm32f7xx_ll_bus.h128 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1030 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
1032 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \
1116 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN)
2201 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != 0U)
2258 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == 0U)
Dstm32h5xx_ll_bus.h168 #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6258 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7590 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
Dstm32g411xc.h7764 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
Dstm32g441xx.h7968 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
Dstm32gbk1cb.h7724 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h6124 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro
Dstm32l412xx.h5902 #define RCC_AHB2ENR_RNGEN RCC_AHB2ENR_RNGEN_Msk macro

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