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Searched refs:RCC_AHB2ENR_ADCEN (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h800 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
802 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
875 #define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN)
1423 #define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != 0U)
1453 #define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) == 0U)
Dstm32l5xx_ll_bus.h96 #define LL_AHB2_GRP1_PERIPH_ADC RCC_AHB2ENR_ADCEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h836 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
838 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
953 #define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN)
1735 #define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != 0U)
1800 #define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) == 0U)
Dstm32l4xx_ll_bus.h118 #define LL_AHB2_GRP1_PERIPH_ADC RCC_AHB2ENR_ADCEN
Dstm32l4xx_ll_rcc.h3516 …return ((READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != 0U) ? LL_RCC_ADC_CLKSOURCE_SYSCLK : LL_RCC_A… in LL_RCC_GetADCClockSource()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h982 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
984 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \
1099 #define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN)
2184 #define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != 0U)
2241 #define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) == 0U)
Dstm32h5xx_ll_bus.h157 #define LL_AHB2_GRP1_PERIPH_ADC RCC_AHB2ENR_ADCEN
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h104 #define LL_AHB2_GRP1_PERIPH_ADC RCC_AHB2ENR_ADCEN
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h6774 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32wb30xx.h6773 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32wb35xx.h7667 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32wb55xx.h7876 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32wb5mxx.h7876 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h6118 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l412xx.h5899 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l433xx.h9878 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l451xx.h10039 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l442xx.h9639 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l431xx.h9780 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l432xx.h9420 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l443xx.h10097 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l471xx.h10995 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l452xx.h10111 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
Dstm32l462xx.h10330 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8937 #define RCC_AHB2ENR_ADCEN RCC_AHB2ENR_ADCEN_Msk macro

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