Home
last modified time | relevance | path

Searched refs:RCC_AHB2ENR1_AESEN (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1007 SET_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_AESEN); \
1009 … tmpreg = READ_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_AESEN); \
1189 #define __HAL_RCC_AES_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_AESEN)
2126 #define __HAL_RCC_AES_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_AESEN) != 0U)
2229 #define __HAL_RCC_AES_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_AESEN) == 0U)
Dstm32u5xx_ll_bus.h140 #define LL_AHB2_GRP1_PERIPH_AES RCC_AHB2ENR1_AESEN
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15145 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro
Dstm32u585xx.h16647 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro
Dstm32u5a5xx.h17696 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro
Dstm32u5g7xx.h19256 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro
Dstm32u5a9xx.h21443 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro
Dstm32u5g9xx.h22388 #define RCC_AHB2ENR1_AESEN RCC_AHB2ENR1_AESEN_Msk /*!< AES Clock … macro